Memory Cell Erase-State Verification During Program Operations
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Solution Overview
Problem
Existing nonvolatile memory devices face reliability issues due to variations in threshold voltages of memory cells during program operations, leading to potential data loss and reduced accuracy in identifying erase states.
Innovation Solution
A memory device and method that includes a program operation controller to determine whether to perform an erase state verify operation based on the magnitude of a program voltage applied to the word line or the number of program loops, ensuring accurate identification of threshold voltages in erase cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a program operation is performed to increase threshold voltages of memory cells, then data storage capability is improved, but threshold voltage variation in erase cells increases leading to reduced reliability
Solution Approach 1:
The patent applies preliminary action by performing an erase state verify operation before the program operation completes. The program operation controller determines whether to perform the verify operation based on program voltage magnitude or program loop count, and executes it to identify threshold voltages of erase cells before final programming. This preventive measure allows correction of threshold voltage variations before they affect data storage reliability.
Solution Approach 2:
The patent implements feedback through the erase state verify operation that provides information about threshold voltage states of erase cells. The program operation controller uses this feedback information to determine whether the program operation was successful and whether additional programming is needed. This closed-loop feedback mechanism ensures data storage reliability by continuously monitoring and adjusting the programming process.
2Productivity
If the threshold voltage of one memory cell is increased during program operation, then data can be stored in that cell, but the threshold voltage of additional memory cells is also influenced causing severe variation
Solution Approach 1:
The patent performs the erase state verify operation as a preliminary action during the program operation process. By checking the threshold voltage state of erase cells at intermediate stages (determined by program voltage magnitude or program loop count), the system can identify and correct threshold voltage variations before they propagate to additional memory cells, maintaining both productivity and precision.
Solution Approach 2:
The patent applies local quality by performing the verify operation selectively on erase cells based on their specific threshold voltage states. Rather than uniformly treating all memory cells, the system identifies which cells are in the erase state and applies targeted verification and correction only to those cells, improving precision without sacrificing overall program operation efficiency.
3Reliability
If an erase state verify operation is performed to identify threshold voltages of erase cells, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the erase state verify operation to serve multiple functions: it identifies threshold voltages of erase cells, determines program operation success, and provides feedback for correction. This multi-functional approach improves reliability without proportionally increasing device complexity, as the same control mechanism handles multiple tasks.
Solution Approach 2:
The program operation controller performs the verify operation using its existing control capabilities and resources. The controller determines whether to perform the verify operation based on program voltage magnitude or program loop count, and executes it using its inherent control functions. This self-service approach avoids adding separate dedicated hardware for verification, thereby improving reliability without significantly increasing device complexity.
Data Source
AI summary
Provided herein is a memory device and a method of operating the memory device. The memory device includes memory cells coupled to a word line, a peripheral circuit configured to perform a program operation of increasing threshold voltages of the memory cells to threshold voltages corresponding to a target program state among a plurality of program states, and a program operation controller configured to determine whether to perform an erase state verify operation of identifying threshold voltages of erase cells having an erase state as the target program state among the memory cells.


