Memory Cell Repair Using Dynamic Error Tables and Backup Cells

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Solution Overview

Problem

Emerging memory devices such as FRAMs, MRAMs, and PCMs face challenges in maintaining data integrity due to varying endurance and reliability among memory cells, leading to 'healthy' cells becoming failure cells over time, which conventional ECC methods struggle to effectively correct as data complexity increases.

Innovation Solution

Implementing an error table and repair table to dynamically monitor and replace memory cells with backup cells based on failure counts, ensuring efficient use of limited backup resources by prioritizing cells with the highest failure risks, and periodically updating these tables to maintain reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional ECC methods are used to correct errors, then data integrity can be maintained to some extent, but the methods struggle to effectively correct errors as data complexity increases and memory cell reliability varies

Engineering Contradiction:
Improvedata integrityVSAvoiderror correction effectiveness
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic monitoring of memory cell failure rates and adaptive replacement strategies. The system continuously tracks failure patterns and adjusts replacement decisions based on current reliability conditions, transitioning from static ECC correction to dynamic prevention through selective cell replacement.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent performs preliminary identification and replacement of high-risk memory cells before they cause fatal errors. By proactively replacing cells with failure rates above a threshold, the system prevents errors rather than merely correcting them, addressing the limitation of reactive ECC methods.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If backup memory cells are used to replace failing cells, then reliability is improved, but the limited number of backup cells must be efficiently managed to maximize their utility

Engineering Contradiction:
Improvememory cell reliabilityVSAvoidnumber of backup memory cells
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent changes the parameter of cell selection from random or uniform replacement to targeted replacement based on failure rate parameters. By using failure rate thresholds and monitoring metrics, the system optimizes which cells are replaced, maximizing the impact of limited backup cells on overall reliability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies different replacement strategies to different memory cells based on their individual failure characteristics. High-risk cells with elevated failure rates are prioritized for replacement, while low-risk cells are monitored without immediate replacement, creating a differentiated quality management approach across the memory array.

Inventive Principle:
Principle #3Local quality

3Reliability

If memory cells are monitored and replaced proactively, then fatal errors are prevented, but the complexity of monitoring and managing replacement tables increases

Engineering Contradiction:
Improveerror prevention capabilityVSAvoidmonitoring and repair system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements self-service mechanisms where the memory system automatically monitors its own cells, identifies failures, and performs replacements without external intervention. The error monitoring circuit and replacement logic operate autonomously within the memory device, reducing the need for complex external management systems.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent combines error monitoring, failure analysis, and cell replacement functions into an integrated repair system within the memory device. By merging these previously separate functions into a unified architecture, the system reduces overall complexity while maintaining comprehensive error prevention capabilities.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20260031173A1Dynamic error monitor and repair
Publication Date: 2026.01.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260031173A1 patent drawing
  • US20260031173A1 patent drawing
  • US20260031173A1 patent drawing

AI summary

A memory device includes: a memory cell array comprising a plurality of memory cells, the plurality of memory cells comprising a plurality of data memory cells including a first data memory cell and a plurality of backup memory cells including a first backup memory cell; a storage storing an error table configured to record errors in the plurality of data memory cells, the error table including a plurality of error table entries, each error table entry corresponding to one of the plurality of data memory cell and having an address and a failure count; and a controller configured to replace the first data memory cell with the first backup memory cell based on the error table.