Memory Erase Verification by Cell String Group With Different Voltages
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Solution Overview
Problem
There is a time difference in erase verify operations between the first and last cell strings when performed on a cell string basis, leading to inefficiencies in nonvolatile memory devices.
Innovation Solution
A memory device that performs erase verify operations on a cell string group basis, applying different erase verify voltages to each group and suspending/resuming erase operations based on the number of completed commands, using an erase operation controller to manage these processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If erase verify operation is performed on a cell string basis, then each cell string can be verified individually, but a time difference occurs between the first and last cell strings leading to inefficiency
Solution Approach 1:
The patent divides cell strings into multiple groups (first cell string group, second cell string group, etc.) and performs erase verify operations on each group separately with different verify voltages. This segmentation allows parallel processing of multiple cell strings while maintaining individual verification accuracy, thus resolving the contradiction between measurement precision and productivity.
2Productivity
If different erase verify voltages are applied to different cell string groups, then time differences are reduced, but device complexity increases
Solution Approach 1:
The patent employs dynamic voltage adjustment where different erase verify voltages are applied to different cell string groups based on their specific characteristics and timing requirements. The erase operation controller dynamically selects and applies appropriate voltages (first erase verify voltage, second erase verify voltage, etc.) to different groups, optimizing efficiency while managing complexity through systematic control.
Data Source
AI summary
Provided herein may be a memory device for performing an erase verify operation on a cell string group basis, and method of operating the same. The memory device may include a plurality of memory blocks, each including a plurality of cell string groups, a peripheral circuit configured to perform an erase verify operation on a memory block selected from among the plurality of memory blocks, and an erase operation controller configured to control the peripheral circuit to perform the erase verify operation in units of cell string groups within the selected memory block. The erase operation controller controls the peripheral circuit to apply, during the erase verify operation, different erase verify voltages to the selected memory block whenever the erase verify operation is performed on each of the cell string groups.