Memory Cell Interference Compensation via Adjacent Read Voltages
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Solution Overview
Problem
High-capacity nonvolatile memory devices face reliability issues due to interference from peripheral memory cells, leading to read errors, which existing technologies have not adequately addressed.
Innovation Solution
A memory system and operating method that involve reading an observation memory cell and adjacent interference cells with different voltages to determine a logical value, using a controller with data buffer units and a determination unit to calculate interference and likelihood ratios, thereby minimizing read errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-bit memory devices are used to increase integration, then the number of memory cells per unit area increases, but read errors occur due to interference from adjacent memory cells
Solution Approach 1:
The patent performs preliminary reading of adjacent interference memory cells before determining the logical value of the observation memory cell. By reading adjacent cells first and calculating their interference effect in advance, the system compensates for interference before it corrupts the final read operation, thereby maintaining data reliability in high-density configurations
Solution Approach 2:
The patent introduces an interference calculation unit that acts as an intermediary between the memory cells and the determination logic. This unit calculates the interference effect from adjacent cells and uses it to adjust the reading voltages or interpret the read data, effectively mediating the harmful interference to preserve data accuracy
2Measurement precision
If reading voltages are adjusted to compensate for interference, then read accuracy improves, but the complexity of the reading operation increases
Solution Approach 1:
The patent segments the reading operation into distinct phases: first reading the observation memory cell, then reading adjacent interference cells, calculating interference, and finally determining the logical value. This segmentation allows each step to be optimized independently and simplifies the overall control logic by breaking down the complex interference compensation process into manageable stages
Solution Approach 2:
The system uses the read data from adjacent memory cells to automatically calculate and compensate for their own interference effect on the observation cell. The memory system self-corrects the interference by using information from the interfering cells themselves, eliminating the need for external calibration or complex pre-computed interference maps
Data Source
AI summary
Provided are a memory system and an operating method thereof. The operating method reads an observation memory cell at least one time with different read voltages to configure a first read data symbol, reads a plurality of interference memory cells adjacent to the observation memory cell at least one time with different read voltages to configure second read data symbols, and determines a logical value of the observation memory cell based on the first read data symbol and the second read data symbols.