Cross-Point Memory Cell Isolation Layer for Leakage Blocking
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Solution Overview
Problem
Semiconductor devices face issues with increased leakage current due to defective memory cells, which disrupt the normal operation of other memory cells by providing a path for current leakage, leading to inefficient data storage and retrieval.
Innovation Solution
Incorporating an open layer with insulating material containing metal ions between memory cells and conductive lines, which can switch between conductive and non-conductive states based on applied voltage or current, blocking current flow in defective memory cells and preventing leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory cells are disposed at intersection regions of conductive lines to increase storage density, then productivity is improved, but defective memory cells cause leakage current that disrupts normal operation of other memory cells
Solution Approach 1:
The patent introduces an open layer as an intermediary component between the memory cell and the conductive line. This open layer contains metal ions that can be moved to form an insulating portion, effectively blocking leakage current. The open layer acts as a mediator that isolates the defect in the memory cell from affecting other cells, while maintaining the high-density intersection structure.
Solution Approach 2:
The patent changes the electrical parameter of the open layer by moving metal ions within it. By applying voltage, the metal ions migrate to form an insulating portion, dynamically changing the layer's conductivity from conductive to insulating state. This parameter change enables the blocking of leakage current paths without altering the physical structure.
2Reliability
If an open layer with insulating material containing metal ions is introduced to block leakage current, then reliability is improved, but device complexity increases
Solution Approach 1:
The open layer serves multiple functions simultaneously: it acts as a blocking layer to prevent leakage current, provides a mechanism for defect isolation, and maintains compatibility with the existing memory cell structure. This multi-functionality reduces the need for additional separate components, thereby limiting the increase in device complexity.
Solution Approach 2:
The open layer is formed using composite material consisting of insulating material containing metal ions. This composite structure combines the insulating properties of the base material with the mobile ionic components, creating a material that can dynamically change its electrical properties. The use of composite materials allows achieving complex functionality with a single layer rather than multiple separate layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces leakage current, ensuring normal operation of memory cells and improving the overall performance of semiconductor devices by blocking current flow in defective cells, thus maintaining optimal operating characteristics.
Implementation Method 1
a layer structured to include an insulating material containing metal ions and formed between each memory cell and at least one of a first conductive line and a second conductive line that intersects with each other at a memory cell
Data Source
AI summary
A semiconductor device may include: a plurality of first conductive lines extending in a first direction; a plurality of second conductive lines spaced apart from the first conductive lines and extending in a second direction intersecting the first direction; and a plurality of memory cells respectively disposed to overlap intersection regions of the plurality of the first conductive lines and the plurality of the second conductive lines; and a layer structured to include an insulating material containing metal ions and formed between each memory cell and at least one of a first conductive line and a second conductive line that intersects with each other at a memory cell.