Memory Cell Assembly With Leaker Structure for Read Disturb Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Read disturb errors occur in memory cells due to excess charge accumulation at the bottom electrode of capacitors in ferroelectric RAM (FeRAM) and other memory devices, leading to unreliable data retrieval and potential depolarization of stored states.
Innovation Solution
Integration of a leaker device within the memory cell to dissipate excess charge from the bottom electrode, configured with appropriate resistance to maintain correct charge storage without excessive discharge, allowing for reduced pitch between memory cells and increased density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are placed closer together to increase density, then manufacturing precision and area utilization improve, but charge leakage between adjacent cells increases causing read disturb errors
Solution Approach 1:
A leaker device is introduced as an intermediary component between adjacent memory cells. This leaker device provides a controlled charge dissipation path that mediates the interaction between neighboring cells, allowing excess charge to be safely discharged without affecting adjacent cell integrity. The leaker device thus enables closer cell spacing while maintaining data retrieval reliability through this intermediate charge management structure.
2Area of stationary object
If pitch between memory cells is reduced to increase density, then area efficiency improves, but charge accumulation at bottom electrode causes read disturb errors
Solution Approach 1:
The leaker device extracts harmful excess charge from the bottom electrode of the capacitor. By providing a dedicated charge dissipation path, the leaker device removes the harmful accumulation effect that would otherwise occur when cells are densely packed. This extraction mechanism allows reduced pitch between cells while preventing read disturb errors caused by charge accumulation.
3Reliability
If leaker device is added to manage charge, then data reliability improves, but device complexity increases
Solution Approach 1:
The leaker device is merged with existing memory cell structures and shared across multiple adjacent memory cells. Rather than adding separate complex charge management systems to each individual cell, the leaker device is strategically positioned to serve multiple cells simultaneously, reducing the overall complexity increase while maintaining data integrity through effective charge management.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The leaker device effectively reduces read disturb errors and maintains accurate data storage by dissipating excess charge, enhancing the reliability of memory cell operations and increasing the number of memory cells that can be packed in a given area.
Implementation Method 1
The leaker device may include a resistor configured to dissipate the excess charge from the bottom electrode
Data Source
AI summary
Implementations described herein relate to various structures, integrated assemblies, and memory devices. In some implementations, a memory device includes multiple memory cells. Each memory cell may include a bottom electrode having an open top cylinder shape that contains a support pillar, may include a top electrode, may include an insulator that separates the top electrode from the bottom electrode, and may include a leaker device having an open top cylinder shape. A bottom surface of the leaker device may abut at least one of a top surface of the bottom electrode or a top surface of the support pillar. A top surface of the leaker device may abut a bottom surface of a conductive plate. The memory device may also include the conductive plate.