Nonvolatile Memory Cell Level Control by Access Frequency
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Solution Overview
Problem
Current flash memory devices face limitations in storage capacity and performance, necessitating improvements to meet increasing demands for higher capacity and faster operations.
Innovation Solution
A memory system comprising nonvolatile memory cells and a memory controller that adjusts cell levels based on access frequency, assigning logical addresses to address groups and reconfiguring memory cells to optimize performance by varying cell levels according to access patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory cells operate at a single fixed cell level, then device complexity is reduced, but performance and storage capacity cannot be optimized for different access frequencies
Solution Approach 1:
The memory device divides memory cells into multiple cell groups, where each group can operate at different cell levels (e.g., SLC, MLC, TLC modes). This segmentation allows frequent access data to use faster cell levels while infrequent data uses higher capacity cell levels, optimizing overall performance without requiring all cells to operate at maximum complexity.
Solution Approach 2:
The memory device dynamically adjusts the cell level of each memory cell group based on access frequency monitoring. The controller transitions cells between different cell levels (e.g., from TLC to MLC or SLC) depending on whether they are frequently or infrequently accessed, allowing the system to adapt its complexity and performance characteristics in real-time.
2Quantity of substance
If memory cells are configured for high storage capacity, then storage capacity increases, but operational speed decreases
Solution Approach 1:
Different memory cell groups operate at different cell levels tailored to their specific access patterns. Frequently accessed data resides in cells operating at lower cell levels (SLC/MLC) for faster operation, while infrequently accessed data uses higher cell levels (TLC) for maximum storage capacity. This local optimization resolves the speed-capacity tradeoff by applying different quality settings to different parts of the memory system.
Data Source
AI summary
A memory system, comprises a nonvolatile memory comprising multiple memory cells, and a memory controller configured to control respective cell levels of the memory cells by assigning a logical address of each memory cell to one of multiple address groups according to a frequency with which the logical address has been accessed, determining a cell level for each address group, and controlling each memory cell to have the cell level of the address group to which its logical address is assigned.