Multilevel Memory Cell Encoding for Small-Write Error Correction
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Solution Overview
Problem
Existing flash devices are inefficient in supporting error correction for small data writes due to their inability to handle write granularities smaller than a nibble, leading to compromised reliability by omitting error correction in single bit per cell (SBC) regions.
Innovation Solution
A multilevel encoding scheme is implemented using a programmer that encodes data into a group of multilevel memory cells, providing error correction coverage by level-shifting cells to achieve a desired Hamming distance and utilizing surplus cell state transitions to ensure reliable small granularity programming without requiring erase/rewrite operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If single bit per cell (SBC) encoding is used for small writes, then write granularity is improved, but reliability deteriorates due to omitted error correction
Solution Approach 1:
The memory device is divided into multiple cell groups, where each group contains multiple cells that can be independently controlled. This segmentation allows the system to apply error correction codes to small write operations by treating each cell group as an independent unit that can be protected individually, thus maintaining both fine write granularity and reliability.
Solution Approach 2:
Error correction codes are introduced as an intermediary layer between the data being written and the physical cell states. These codes are calculated based on the data and stored in additional cells within the cell group, serving as a mediator that detects and corrects errors without interfering with the primary data storage function or the write granularity capability.
2Reliability
If error correction codes are applied to small writes, then reliability is improved, but device complexity increases
Solution Approach 1:
The error correction mechanism is applied locally to each cell group rather than throughout the entire memory device. Each cell group has its own dedicated error correction codes that are calculated and stored within the same group, allowing error correction functionality to be distributed locally and reducing the overall complexity compared to a global approach.
Solution Approach 2:
Instead of applying error correction to all possible write operations uniformly, the system applies error correction selectively to small write operations that require it. The error correction codes are calculated only when needed based on the write operation type, reducing computational complexity while maintaining reliability where most needed.
3Quantity of substance
If multilevel encoding is used, then storage density is improved, but error correction difficulty increases
Solution Approach 1:
The memory is organized into cell groups where each group contains multiple cells that can be independently controlled and encoded. This segmentation allows the system to apply error correction codes to small write operations by treating each cell group as an independent unit that can be protected individually, thus maintaining both fine write granularity and reliability.
Solution Approach 2:
Error correction codes are introduced as an intermediary layer between the data being written and the physical cell states. These codes are calculated based on the data and stored in additional cells within the cell group, serving as a mediator that detects and corrects errors without interfering with the primary data storage function or the write granularity capability.
Data Source
AI summary
Embodiments of the present disclosure provide methods, systems, and apparatuses related to multilevel encoding with error correction. In some embodiments, a plurality of bits may be encoded into a plurality of multilevel memory cells by level-shifting a subset of the plurality of multilevel memory cells for a bit of the plurality of bits. Other embodiments may be described and claimed.