Individually Controllable Power Sources for Memory Cells
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory storage cells formed from semiconductors face challenges in consistently writing and reading data due to increasing process variations and variable threshold voltages at smaller geometries, leading to unreliable data storage and potential data loss, especially when multiple cells share a power supply.
Innovation Solution
A semiconductor memory storage cell with individually controllable power sources for each device, allowing for independent power management to address the challenges of varying voltage levels and process variations, enabling secure value storage and consistent writing and reading operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single power supply is shared by multiple memory cells, then device complexity is reduced, but reliability deteriorates because all cells are unpowered during write operations making them vulnerable to data loss
Solution Approach 1:
The power supply system is segmented into individual controllable power supplies for each memory cell. Each memory cell receives power from its own dedicated power supply that can be independently controlled, allowing the cell being written to be unpowered while other cells remain powered and retain their data.
Solution Approach 2:
The power supply system becomes dynamic with individually controllable power supplies that can be switched on and off independently for each memory cell based on write operation requirements. This dynamic control allows selective powering during write operations without affecting other cells.
2Ease of operation
If a lower voltage level is used during write operations, then ease of operation improves for writing zeros, but productivity deteriorates because writing ones becomes slower
Solution Approach 1:
Different voltage levels are applied to different parts of the memory cell based on the write operation requirements. The first and second power supplies can provide different voltage levels to different devices within the same memory cell, allowing optimized write conditions for both zeros and ones without compromising overall write speed.
3Reliability
If two separate power rails are used for write assist, then reliability improves for writing zeros, but device complexity increases
Solution Approach 1:
The power supply structure is segmented into individually controllable power supplies for each memory cell, eliminating the need for complex shared power rail routing. Each cell's dedicated power supply simplifies the overall power distribution architecture while maintaining the ability to provide write assist functionality.
Data Source
AI summary
A semiconductor memory storage cell and a memory comprising an array of these storage cells is disclosed. The storage cell comprising: a feedback loop comprising two devices for storing opposite binary values; data input and output for inputting data to and outputting data from said two devices; and each of said two devices comprising a power source input, such that each device can be powered independently of the other.