Memory Cell Program Speed Adaptation for Uniform Threshold Distribution
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Solution Overview
Problem
Memory devices face reliability issues due to differences in electrical characteristics among memory cells, leading to varying program speeds during operations, which can deteriorate the reliability of program operations.
Innovation Solution
A memory device is designed with a cell speed determiner to assess the program speed of memory cells based on the number of pulses applied during programming, and a program manager adjusts the program conditions accordingly to ensure consistent operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a program operation is performed on multiple memory cells with different electrical characteristics, then data can be stored in the memory cell array, but the program speeds of the memory cells differ, deteriorating the reliability of the program operation
Solution Approach 1:
The patent applies dynamics by making the program condition adjustable based on detected program speed. The control logic circuit dynamically changes program conditions (such as programming pulse width or voltage levels) according to the measured program speed of memory cells, allowing the system to adapt to variations in cell characteristics and achieve uniform programming across all cells, thereby improving reliability.
Solution Approach 2:
The patent implements feedback by introducing a cell speed determiner that measures the actual program speed of memory cells and provides this information back to the control logic circuit. The control logic circuit then uses this feedback to adjust program conditions for subsequent operations, creating a closed-loop system that ensures consistent programming results despite manufacturing variations.
2Reliability
If the program condition is adjusted for each memory cell based on its speed, then the reliability of program operations is improved, but the device complexity increases due to additional control circuits
Solution Approach 1:
The patent applies universality by designing the control logic circuit to perform multiple functions: it controls the voltage generator, manages the programming process, and incorporates the cell speed determiner within the same circuit structure. This multi-functional approach allows the system to achieve adaptive programming without adding separate dedicated circuits for each function, thereby limiting the increase in overall device complexity.
Data Source
AI summary
Provided herein is a memory device for performing a program operation on memory cells. The memory device include a plurality of memory cells configured to store data, a voltage generator configured to apply program voltages to a word line coupled to the plurality of memory cells during a program operation in which the plurality of memory cells are programmed to a plurality of program states, a cell speed determiner configured to determine a program speed of the plurality of memory cells depending on a number of pulses for the program voltages applied to the word line while the program operation is being performed, and a program manager configured to change a condition for remaining program operations depending on the program speed determined by the cell speed determiner.