Memory Cell Programming via Periodic Pulse Sequences
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Solution Overview
Problem
Existing flash memory devices face challenges in reducing threshold voltage distribution width without significantly impacting programming throughput, as reducing programming step voltage can lead to increased programming time and potential over-programming issues.
Innovation Solution
The method involves applying multiple programming pulses at the same control gate voltage before incrementing the voltage, which quickly pushes memory cells into the saturation area, resulting in narrower threshold voltage distributions and improved programming efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If programming step voltage is reduced to narrow threshold voltage distribution, then manufacturing precision of Vt distribution is improved, but programming speed deteriorates and programming time increases
Solution Approach 1:
The patent applies periodic programming pulses with specific timing characteristics. Multiple programming pulses are applied in sequence with defined pulse widths and intervals, creating a periodic action pattern that efficiently charges the floating gate while maintaining narrow Vt distribution and avoiding over-programming.
Solution Approach 2:
The patent dynamically adjusts programming parameters including pulse voltage amplitude, pulse width, and interval timing based on the programming stage. This parameter optimization allows achieving narrow Vt distribution without excessive programming time by adapting the programming conditions to the cell's charging state.
2Manufacturing precision
If programming step voltage is reduced to improve Vt distribution, then manufacturing precision is improved, but loss of time increases due to extended programming duration
Solution Approach 1:
The patent employs periodic programming pulses with optimized pulse width and interval timing. This periodic action enables efficient charge accumulation on the floating gate, achieving narrow Vt distribution within reduced programming time compared to continuous or evenly-spaced pulsing schemes.
Solution Approach 2:
The patent applies preliminary programming pulses at specific voltage levels before final verification. This preliminary action pre-charges selected cells to near-target Vt levels, reducing the time required for final programming steps and overall programming cycle time while maintaining precise Vt control.
3Ease of operation
If incrementally increasing programming pulses are used to program cells, then ease of operation is maintained, but manufacturing precision of Vt distribution deteriorates due to saturation effects
Solution Approach 1:
The patent replaces simple incremental voltage increases with a periodic pulsing scheme featuring multiple pulses at optimized voltage levels. This periodic action provides better control over charge accumulation, narrowing Vt distribution while maintaining programming control through automated pulse sequencing.
Solution Approach 2:
The patent implements dynamic programming pulse generation where pulse characteristics (voltage, width, interval) are adjusted based on cell state and programming progress. This dynamic approach optimizes Vt distribution precision throughout the programming process while maintaining ease of operation through automated control.
4Manufacturing precision
If multiple programming pulses are applied to achieve target Vt, then manufacturing precision is improved, but productivity decreases due to increased programming cycles
Solution Approach 1:
The patent uses periodic programming pulses with optimized frequency and duration to efficiently charge floating gates. This periodic action achieves narrow Vt distribution in fewer effective cycles compared to traditional incremental approaches, thereby maintaining higher programming throughput while improving Vt precision.
Solution Approach 2:
The patent applies programming pulses that quickly drive selected cells into the saturation area, then pauses further pulsing to verification. This rushing-through approach for cells needing programming reduces overall programming cycles needed, improving productivity while maintaining precision through selective application.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for narrower threshold voltage distributions without significantly reducing programming speed, enhancing state discrimination and reducing the risk of over-programming, while maintaining efficient programming throughput.
Implementation Method 1
Each of the memory cells includes a floating gate field-effect transistor capable of holding a charge. Each cell's threshold voltage (Vt) determines the data that is stored in the cell.
Implementation Method 2
The data in a cell is determined by the presence or absence of charge on the floating gate. The charge can be removed from the floating gate by a block erase operation.
Implementation Method 3
The variations in each Vt distribution width is an important parameter to control during programming. The programming pulses start at Vstart and increment by a step voltage ΔV from the previous pulse.
Data Source
AI summary
Methods for programming a memory device and memory devices are provided. According to at least one such method, a selected memory cell is programmed by a series of programming pulses. The series of programming pulses are configured in sets of programming pulses where each set has the same quantity of pulses and each programming pulse in the set has substantially the same amplitude (i.e., programming voltage). The amplitude of the programming pulses of subsequent sets is increased by a step voltage from the previous amplitude.