Memory Cell Read Sequence Detection for Inter-Cell Interference

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Solution Overview

Problem

Traditional semiconductor memory systems fail to accurately read data due to inter-cell interference, which increases with cell density and bits stored per cell, leading to error-correction failures and performance degradation.

Innovation Solution

A memory integrated circuit (IC) with a sequence detector module that uses a trellis and Viterbi detector to collectively process read signals from multiple cells, generating reference signals and path metrics to accurately detect data sequences despite inter-cell interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If cell density and bits stored per cell are increased, then storage capacity is improved, but inter-cell interference increases causing read errors

Engineering Contradiction:
Improvestorage capacityVSAvoidread accuracy
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent merges the reading of multiple adjacent cells into a single combined read operation. Instead of reading cells independently, the system reads multiple cells simultaneously and processes their combined signals through sequence detection algorithms, allowing the system to handle inter-cell interference as a unified problem rather than individual cell errors

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements feedback through iterative sequence detection and error correction. The Viterbi detector and decision feedback equalizer continuously refine their estimates of stored data based on feedback from read signals, allowing the system to adapt to inter-cell interference patterns and correct errors that would otherwise be irreversible

Inventive Principle:
Principle #23Feedback

2Device complexity

If traditional independent cell reading is used, then device complexity is low, but measurement precision deteriorates due to unaccounted inter-cell interference

Engineering Contradiction:
Improvereading mechanism complexityVSAvoiddata reading accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent introduces sequence detection algorithms as intermediary processing layers between the physical read signals and the final data interpretation. These algorithms act as mediators that translate the complex, interference-affected read signals into accurate data sequences by modeling and compensating for inter-cell interference effects

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent transitions from reading cells in a simple one-dimensional sequence to processing them as multi-dimensional signals that capture interference patterns across multiple cells. By adding temporal and spatial dimensions to the reading process through sequence detection, the system gains the ability to distinguish between desired data and interference artifacts

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9208882B2System and method for reading memory cells by accounting for inter-cell interference
Publication Date: 2015.12.08 MARVELL ASIA PTE LTD
  • US9208882B2 patent drawing
  • US9208882B2 patent drawing
  • US9208882B2 patent drawing

AI summary

A system including a read module and a detector module. The read module is configured to generate a plurality of read signals by reading a plurality of memory cells located along a bit line or a word line. The detector module is configured to detect a sequence of data stored in the plurality of memory cells based on (i) the plurality of read signals, and (ii) a plurality of reference signals associated with the plurality of memory cells. One of the plurality of reference signals associated with a first memory cell of the plurality of memory cells includes one of a first signal and a second signal. The first signal is free of interference from a second memory cell adjacent to the first memory cell along the bit line or the word line. The second signal accounts for interference from the second memory cell.