Memory Cell Reading Without Shield Lines
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Solution Overview
Problem
Existing memory devices require shield lines to prevent cross-talk between reference and data lines, which increases memory area and power consumption, necessitating a method to read from memory cells without the need for these additional lines.
Innovation Solution
The proposed solution involves merging reference lines with data lines and routing them through an interconnection network within the memory architecture, eliminating the need for shield lines by using multiplexers to select and combine reference and data signals for sense amplifiers, thereby balancing capacitance and reducing area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If shield lines are added to protect reference lines against cross-talk, then cross-talk protection is improved, but memory area increases
Solution Approach 1:
The patent merges reference lines with data lines by routing both through shared interconnection networks and multiplexers. Instead of providing separate shield lines for each reference line, the design combines the routing infrastructure so that reference and data signals share common pathways with controlled switching, thereby eliminating the need for additional shield lines while maintaining signal integrity
Solution Approach 2:
The interconnection network and multiplexer structures serve dual functions: they route both data lines and reference lines through the same infrastructure. This multi-functional approach allows a single routing network to handle multiple signal types without requiring dedicated shield lines for each reference signal, thus reducing overall area while providing cross-talk protection through controlled signal switching
2Object-affected harmful factors
If shield lines are added to protect reference lines against cross-talk, then cross-talk protection is improved, but power consumption increases
Solution Approach 1:
By merging reference and data line routing through shared interconnection networks, the patent eliminates the need for separate shield lines that would consume additional power. The combined routing structure reduces the total number of conductors and associated drive circuits, thereby lowering overall power consumption while maintaining cross-talk protection through controlled signal switching
3Area of stationary object
If reference lines are merged with data lines through multiplexers, then area is reduced, but line capacitance balancing becomes more complex
Solution Approach 1:
The patent employs dynamic capacitance balancing through controlled switching of multiplexers. Instead of using fixed, statically balanced line structures, the design dynamically adjusts which reference and data lines are active at any given time, allowing the system to maintain capacitance balance through temporal switching patterns rather than requiring complex static balancing structures
Data Source
AI summary
A method and a system for reading from memory cells in a memory device are provided. In one embodiment, the memory device comprises a first plurality of data lines and a second plurality of data lines, at least one first multiplexer coupled to the first plurality of data lines and at least one low reference line, at least one second multiplexer coupled to the second plurality of data lines and at least one high reference line, at least one third multiplexer coupled to the at least one first multiplexer and the at least one second multiplexer, and a reference memory cell coupled to the at least one third multiplexer and at least one sense amplifier.