Memory Cell Verification via Reference Pattern Comparison
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Electronic memories lack effective mechanisms to protect against manipulation and active attacks, such as probing or laser attacks, which can compromise secret data or impair device functionality, especially in safety-critical applications like automotive systems.
Innovation Solution
A memory arrangement with a memory control device that enables partial write access to memory words, using unmodified memory cells as reference patterns for verification, and a verification circuit that checks the integrity of memory access by comparing read values with stored reference values, thereby ensuring correct addressing and detecting potential attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If simple readback of written data is used to detect errors, then sporadic errors can be detected, but persistent errors and active attacks (probing, laser) cannot be reliably detected
Solution Approach 1:
The patent applies preliminary action by storing reference values in unmodified memory cells before the attack occurs. These reference values are read out and compared with the modified memory cells after the attack, enabling detection of both sporadic errors and active attacks like probing or laser manipulation. The verification mechanism is prepared in advance and activated when needed.
2Reliability
If additional verification mechanisms are added to memory cells, then attack detection improves, but device complexity increases
Solution Approach 1:
The patent implements self-service by using the memory cells themselves to store both the data and the reference values for verification. The unmodified memory cells automatically serve as the verification reference without requiring external verification hardware. The verification circuit simply reads and compares values already present in the memory structure.
Solution Approach 2:
The memory cells serve multiple functions: they store the actual data, store the reference values for verification, and enable both write and read operations. This multi-functionality eliminates the need for separate verification storage structures, reducing overall device complexity while maintaining integrity verification capabilities.
3Ease of operation
If all memory cells are modified during write access, then write operation is simple, but verification of correct addressing becomes difficult
Solution Approach 1:
The patent segments the memory cell array into modified cells (first group) and unmodified cells (second group). This segmentation allows the write operation to affect only the intended memory cells while leaving reference cells unchanged. The verification circuit then compares values between these segmented groups to confirm correct addressing, resolving the contradiction between simple writing and precise verification.
Data Source
AI summary
A memory arrangement having a memory cell field with columns and rows of writable memory cells, a memory controller which is configured to initiate an access to a first group of memory cells of a row of memory cells and, together with the access to the first group of memory cells, to initiate a read access to a second group of memory cells of the row of memory cells, and a verification circuit which is configured to check whether the access to the first group of memory cells has been performed on the correct row of memory cells on the basis of whether values read during the read access to the second group of memory cells match values previously stored by the second group of memory cells.