Memory Cell Refresh via Opposite Polarity Pulse

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Solution Overview

Problem

Memory cells in electronic devices are prone to unintentional state shifts due to frequent read operations without corresponding write operations, leading to potential errors and data corruption, which existing refresh mechanisms do not adequately address.

Innovation Solution

A refresh operation is performed on memory cells by applying a refresh pulse with opposite polarity to reinforce the programmed logic state, mitigating state shifts and reducing error likelihood during read operations, and this can be triggered based on the quantity of read operations or by implementing a counter to track access operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If read operations are performed frequently to access stored information, then data accessibility is improved, but unintentional state shifts occur leading to data corruption

Engineering Contradiction:
Improvedata accessibilityVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs a preliminary read operation to detect the logic state before the actual data access. Based on this preliminary detection, a refresh operation is conditionally executed to reinforce the programmed state. This preliminary action prevents unintentional state shifts during subsequent read operations, resolving the contradiction between frequent access and data integrity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a feedback mechanism where the result of the preliminary read operation (logic state detection) feeds back into the control logic to determine whether a refresh operation is needed. This feedback loop ensures that refresh operations are performed only when necessary, maintaining data integrity while minimizing overhead during frequent access patterns.

Inventive Principle:
Principle #23Feedback

2Reliability

If refresh operations are performed to stabilize logic state, then data integrity is improved, but additional operations increase system complexity

Engineering Contradiction:
Improvedata integrityVSAvoidoperation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of performing a full refresh operation every time, the system applies a partial refresh action only when the preliminary read detects a need. This selective partial action reduces the complexity overhead compared to continuous full refresh operations, while still effectively maintaining data integrity.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The memory cell structure itself provides the refresh functionality through its inherent properties. The preliminary read operation and conditional refresh mechanism leverage the cell's own state detection capabilities, reducing the need for external complex control circuits and simplifying the overall device architecture.

Inventive Principle:
Principle #25Self-service

3Stability of the object's composition

If refresh pulse is applied to reinforce logic state, then state stability is improved, but energy consumption increases

Engineering Contradiction:
Improvelogic state stabilityVSAvoidenergy consumption
Core Design Contradiction:
Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The system applies refresh operations periodically based on the detection of logic state during preliminary reads, rather than continuously. This periodic action maintains logic state stability while minimizing energy consumption by activating refresh only when necessary, reducing unnecessary energy expenditure.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system changes the parameter of operation frequency by performing preliminary reads to detect logic state before initiating refresh operations. This parameter change enables conditional refreshing, reducing the frequency of energy-intensive refresh operations while maintaining adequate state stability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11798622B2Refresh operation of a memory cell
Publication Date: 2023.10.24 MICRON TECHNOLOGY INC
  • US11798622B2 patent drawing
  • US11798622B2 patent drawing
  • US11798622B2 patent drawing

AI summary

Methods, systems, and devices for a refresh operation of a memory cell are described. A memory device may include a plurality of rows of memory cells. Each row of memory cells may undergo a quantity of access operations (e.g., read operations, write operations). During a read operation, a logic state of one or more memory cells may be determined by applying a read pulse having a first polarity. Based on the one or more memory cells storing a particular logic state (e.g., a first logic state), a refresh operation may be performed. During a refresh operation, a refresh pulse having a second polarity (e.g., a different polarity than the first polarity) may be applied to the one or more memory cells.