Memory Cell Repair via One-to-One Address Mapping
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Solution Overview
Problem
Conventional methods for repairing defective memory cells in SRAMs require replacing entire rows or columns, leading to inefficient resource utilization and limited repairability, as non-defective cells are also replaced along with defective ones.
Innovation Solution
A method and apparatus that establish a one-to-one mapping relationship between defective and redundant memory cells, allowing for the selective replacement of defective cells with redundant cells without affecting entire rows or columns, thereby optimizing resource utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional row-or-column replacement method is used to repair defective memory cells, then defective cells can be replaced, but non-defective cells are also replaced along with them, leading to inefficient resource utilization
Solution Approach 1:
The patent segments the replacement process from row/column level to individual cell level. Instead of replacing entire rows or columns when a defective cell is detected, the system identifies and replaces only the specific defective memory cell by establishing a one-to-one mapping between the defective cell address and a redundant cell address, thereby avoiding replacement of non-defective cells.
Solution Approach 2:
The patent applies local quality by treating each defective memory cell individually rather than uniformly replacing all cells in a row or column. The repair mechanism locally targets only the affected cell through address mapping, preserving the functionality of other cells in the same row or column that are not defective.
2Reliability
If redundant memory cells are designed to replace defective cells, then yield can be improved, but silicon area is increased and redundant cells waste space when no defects exist
Solution Approach 1:
The patent makes redundant memory cells universally applicable to replace any defective cell in the array through address mapping. A single redundant cell can serve multiple potential defect locations by dynamically mapping different defective cell addresses to appropriate redundant cell addresses, maximizing the utility of each redundant cell across the entire memory array.
Solution Approach 2:
The patent changes the addressing parameter dynamically to achieve repair. By modifying the address translation through mapping relationships established in lookup tables, the system can redirect access from defective cells to redundant cells without changing the physical memory structure, thereby maintaining high density while providing repair capability.
3Reliability
If row address replacement is used for defective cells, then defective cells can be accessed, but non-defective cells sharing the same row address are also replaced, limiting the number of repairable defective cells
Solution Approach 1:
The patent segments the address replacement from row-level to cell-level precision. Instead of replacing all cells in a row when one cell is defective, the system individually maps only the specific defective cell address to a redundant cell, allowing multiple defective cells in the same row to be repaired using different redundant cells.
Solution Approach 2:
The patent introduces an address mapping intermediary (lookup table) that mediates between the original memory cell addresses and redundant cell addresses. This intermediary enables precise one-to-one mapping of defective cells to redundant cells, avoiding the coarse-grained row-level replacement that limits repairability.
Data Source
AI summary
A method for repairing defective memory cells includes receiving an access command having an access address and an access operation. The access address includes a row address and a column address. The method further includes determining whether the row address and the column address are the same as a pre-recorded row address and column address of a defective memory cell. If the row and column addresses of the access address are the same as the respective row and column addresses of the defective memory cell, the method includes replacing the defective memory cell with a redundant memory cell, and executing the access operation using the redundant memory cell.