Memory Cell Reprogramming to Reduce Neighbor Word Line Interference
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Solution Overview
Problem
Existing memory devices face challenges with neighbor word line interference (NWI) that worsen data retention and threshold voltage (Vth) distributions due to capacitive coupling between adjacent memory cells, particularly in 3D memory structures, which are exacerbated by higher temperatures and additional programming pulses.
Innovation Solution
Reprogramming memory cells after initial programming, specifically targeting lower state cells adjacent to higher state cells on an adjacent word line, using tailored program pulse magnitudes to minimize interference and improve Vth distributions, often in multiple reprogramming operations without verify tests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are programmed in 3D stacked structures with higher density, then storage capacity is improved, but neighbor word line interference worsens due to capacitive coupling between adjacent cells
Solution Approach 1:
The patent segments the programming process into multiple distinct phases: initial programming, verification, and reprogramming. This segmentation allows the system to address NWI effects systematically by separating the programming of adjacent word lines into distinct time intervals, thereby reducing capacitive coupling interference while maintaining high storage capacity in 3D structures
Solution Approach 2:
The patent applies preliminary reprogramming actions to memory cells on the first word line before finalizing programming on the second word line. This preliminary action compensates for anticipated NWI effects from adjacent cells, ensuring that threshold voltage distributions remain tight even in high-density 3D stacked configurations
2Duration of action of stationary object
If additional programming pulses are applied to improve data retention, then data retention is improved, but neighbor word line interference is exacerbated due to increased capacitive coupling
Solution Approach 1:
The patent implements continuous monitoring and reprogramming operations that maintain data integrity without requiring excessive programming pulses. By continuously verifying and adjusting threshold voltages through controlled reprogramming, the system achieves improved data retention while limiting the cumulative NWI effects that would result from uncontrolled additional pulsing
Solution Approach 2:
The patent dynamically adjusts programming parameters including pulse magnitude, duration, and timing intervals based on the programming state of adjacent word lines. This parameter optimization ensures sufficient programming strength for data retention while minimizing capacitive coupling effects that cause NWI, particularly in 3D stacked memory structures
3Manufacturing precision
If verify tests are performed after each programming operation, then manufacturing precision is improved, but productivity decreases due to additional time required for verification and reprogramming
Solution Approach 1:
The patent applies partial verification by performing reprogramming operations selectively on only those memory cells that require adjustment due to NWI effects, rather than verifying every cell. This partial action maintains tight threshold voltage distributions for critical cells while avoiding the productivity penalty of comprehensive verification of all cells
Solution Approach 2:
The patent implements optimized verification timing by skipping redundant verify tests for cells that are unlikely to be affected by NWI based on their programming state and adjacent cell configurations. This selective skipping maintains manufacturing precision for vulnerable cells while significantly improving overall programming throughput and productivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach tightens Vth distributions and enhances data retention by reducing neighbor word line interference, improving the overall performance and longevity of memory devices.
Implementation Method 1
neighbor word line interference (NWI) that worsen data retention and threshold voltage (Vth) distributions due to capacitive coupling between adjacent memory cells
Data Source
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AI summary
Techniques are described for reprogramming memory cells to tighten threshold voltage distributions and improve data retention. In one aspect, the memory cells of a word line WLn are reprogrammed after programming of memory cells of an adjacent, later-programmed word line WLn+1. The reprogramming can be limited to lower state memory cells of WLn which are adjacent to lower state memory cells of WL+1. A program pulse magnitude used in the reprogramming can be tailored to the data states of the WLn memory cell and the adjacent, WLn+1 memory cell. In some cases, the program pulse magnitudes can be grouped to reduce the implementation complexity and time. The reprogramming can occur after an initial program operation has completed, during an idle time of a control circuit.