Memory Cell Re-Verification for Short-Term Data Retention

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Solution Overview

Problem

Non-volatile memory devices face challenges with short-term data retention due to insecure charge loss from traps with shallow energy levels, leading to threshold voltage drift, which worsens with higher memory states.

Innovation Solution

Implementing a method that re-verifies and reprograms memory cells whose threshold voltages have shifted below the verify level after initial programming, using a quick pass write voltage to prevent over-programming and maintain data retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are programmed to higher memory states to increase storage density, then storage capacity is improved, but short-term data retention deteriorates due to threshold voltage drift from insecure charge loss

Engineering Contradiction:
Improvestorage capacityVSAvoidshort-term data retention
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by performing re-verification after programming and re-programming cells that show threshold voltage drift before the programming operation is considered complete. This preliminary corrective action prevents data retention issues from manifesting, allowing higher memory states to be used reliably for increased storage density.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the program-verify-loop mechanism where threshold voltage is measured after programming, and based on this feedback, additional programming pulses are applied if drift is detected. This closed-loop feedback ensures that cells maintaining higher memory states do so with adequate data retention, enabling increased storage capacity.

Inventive Principle:
Principle #23Feedback

2Reliability

If multiple programming pulses are applied to correct threshold voltage drift, then data retention is improved, but programming time and complexity increase

Engineering Contradiction:
Improvedata retentionVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The feedback mechanism measures threshold voltage after each programming pulse and only applies additional pulses when drift is detected. This conditional feedback reduces unnecessary programming operations, minimizing time loss while ensuring data retention for cells that do experience drift.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies partial action by using small incremental programming pulses rather than large single pulses. This allows precise correction of threshold voltage drift with minimal additional time, balancing data retention improvement with programming efficiency.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If re-verification and re-programming operations are performed, then short-term data retention is improved, but device complexity increases

Engineering Contradiction:
Improveshort-term data retentionVSAvoidprogramming operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The feedback-based program-verify-loop integrates re-verification and re-programming into an automated control sequence. The controller automatically measures threshold voltage, compares it to expected values, and applies corrective pulses only when needed, managing complexity through intelligent control rather than additional hardware.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs self-service through automatic threshold voltage measurement and self-diagnosis, where the programming circuitry itself verifies its own work and corrects any issues without external intervention, reducing the need for additional complex verification hardware.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Improves short-term data retention by ensuring memory cells remain above the verify voltage level, thereby enhancing the reliability of non-volatile memory devices, especially for higher memory states.

Implementation Method 1

The controller is configured to apply a plurality of programming pulses to the first memory cell

Methodology Applied
Scientific EffectElectrical field effect: Electric Field

Implementation Method 2

apply a plurality of first verify pulses to the first memory cell, determine from the first verify pulses whether the first memory cell has been programmed to the first programmed memory state

Methodology Applied
Scientific EffectElectrical field measurement: Electric Field

Implementation Method 3

A charge-storing material such as a floating gate or a charge-trapping material can be used in such memory devices to store a charge which represents a memory state

Methodology Applied
Scientific EffectCharge storage: Capacitance

Data Source

PatentUS20230410910A1Apparatus and methods for programming memory cells
Publication Date: 2023.12.21 SANDISK TECHNOLOGIES LLC
  • US20230410910A1 patent drawing
  • US20230410910A1 patent drawing
  • US20230410910A1 patent drawing

AI summary

An apparatus is provided that includes a memory die having a first memory cell, and a controller connected to the memory die. The controller is configured to apply a plurality of programming pulses to the first memory cell, apply a plurality of first verify pulses to the first memory cell, determine from the first verify pulses that the first memory cell has been programmed to a first programmed memory state, apply a single second verify pulse to the first memory cell after determining that the first memory cell has been programmed to the first programmed memory state, determine from the single second verify pulse that the first memory cell is no longer programmed to the first programmed memory state, and apply an additional programming pulse to the first memory cell.