Semiconductor Memory Cell Segmentation for Speed and Retention
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Solution Overview
Problem
Current semiconductor memory devices either operate quickly but lose data when power is off, or they retain data but operate slowly, lacking a balance between volatility and non-volatility.
Innovation Solution
A semiconductor memory cell design that incorporates a substrate with alternating conductivity types, a buried layer, and a nonvolatile memory element, allowing data to be transferred between volatile and nonvolatile states, enabling fast operation while retaining data during power disruptions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-volatile memory devices are used to retain data without power, then data retention capability is improved, but operation speed deteriorates
Solution Approach 1:
The memory device is divided into two distinct memory types: volatile memory for fast data storage and non-volatile memory for data retention. Each memory type operates independently, allowing the system to leverage the speed advantage of volatile memory while maintaining the data retention capability of non-volatile memory, thus resolving the contradiction between operation speed and data retention capability
Solution Approach 2:
The memory device performs multiple functions by combining both volatile and non-volatile memory capabilities in a single system. It can operate in volatile mode for high-speed operations and switch to non-volatile mode for data retention, providing universal functionality that addresses both speed and reliability requirements simultaneously
2Speed
If volatile memory devices are used for fast operation, then operation speed is improved, but data retention capability deteriorates
Solution Approach 1:
The memory system segments data storage functions between volatile and non-volatile memory components. The volatile memory handles high-speed operational storage while the non-volatile memory component ensures data retention, allowing the system to achieve both fast operation and data retention capability through functional segmentation
Solution Approach 2:
The non-volatile memory acts as an intermediary backup mechanism that receives data from the volatile memory. This intermediary structure allows the volatile memory to operate at high speed while the non-volatile memory provides a safety net for data retention, resolving the contradiction between speed and reliability
Data Source
AI summary
A semiconductor memory cell and arrays of memory cells are provided In at least one embodiment, a memory cell includes a substrate having a top surface, the substrate having a first conductivity type selected from a p-type conductivity type and an n-type conductivity type; a first region having a second conductivity type selected from the p-type and n-type conductivity types, the second conductivity type being different from the first conductivity type, the first region being formed in the substrate and exposed at the top surface; a second region having the second conductivity type, the second region being formed in the substrate, spaced apart from the first region and exposed at the top surface; a buried layer in the substrate below the first and second regions, spaced apart from the first and second regions and having the second conductivity type; a body region formed between the first and second regions and the buried layer, the body region having the first conductivity type; a gate positioned between the first and second regions and above the top surface; and a nonvolatile memory configured to store data upon transfer from the body region.