Memory Cell Selector and Storage Integration
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Solution Overview
Problem
Traditional memory cells require separate selector devices and memory elements, increasing complexity and power consumption due to the need for high voltage and long duration pulses for operation.
Innovation Solution
A memory cell with a single layer of material between electrodes, exhibiting different threshold voltages based on read and write pulse polarities, allowing it to act as both a selector and memory element, reducing the number of layers and power required for operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate selector devices and memory elements are used, then the memory cell can store and access data, but the number of materials and layers increases, increasing fabrication complexity
Solution Approach 1:
The patent merges the selector device and memory element into a single device structure. The memory cell comprises a single layer of material between two electrodes that exhibits different threshold voltages based on pulse polarity, eliminating the need for separate selector and memory components while maintaining both selection and storage functions.
Solution Approach 2:
The single layer material structure serves multiple functions simultaneously: it acts as both the selector device for device selection and the memory element for data storage. The ability to exhibit different threshold voltages based on read/write pulse polarities enables this multi-functionality within a unified structure.
2Reliability
If separate selector devices and memory elements are used, then data can be selected and stored, but the fabrication process becomes more complex
Solution Approach 1:
By combining the selector and memory element into one structure, the patent reduces the number of fabrication steps. Instead of forming separate devices with multiple materials and layers, the process involves forming a single layer of material with specific properties, significantly simplifying the manufacturing process.
3Reliability
If high voltage and long duration pulses are used to activate selector and write/ read memory, then data can be written and read, but power consumption increases
Solution Approach 1:
The patent utilizes parameter changes in the material's electrical characteristics based on pulse polarity. The memory cell exhibits different threshold voltages for read and write operations depending on the polarity of the applied pulse. This enables efficient operation with lower power consumption by matching the pulse parameters to the required operation type.
4Ease of manufacture
If the memory cell uses a single layer structure, then fabrication is simplified, but the ability to maintain different resistance states may be compromised
Solution Approach 1:
The single layer material exhibits variable electrical characteristics based on the polarity of applied pulses. By changing the pulse polarity parameter, the material transitions between different resistance states, enabling stable data storage without requiring complex multi-layer structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution simplifies the memory array architecture, reduces processing steps, and lowers power consumption by using short, low-power pulses for reading and writing, while maintaining non-destructive reading and minimizing thermal disturb.
Implementation Method 1
A memory cell with a single layer of material between electrodes, exhibiting different threshold voltages based on read and write pulse polarities
Data Source
Figure 1
Figure 2
Figure 3A
AI summary
Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.