Memory Cell Sensing with Ramping Voltage and ADC
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Solution Overview
Problem
Sensing operations in multilevel flash memory cells, particularly in NAND architecture, face challenges with erroneous results due to variations in voltage ramp rate and distortions, leading to inaccurate state detection of memory cells.
Innovation Solution
Implementing a method that applies a ramping voltage to the control gate of a memory cell and an analog-to-digital converter (ADC), where the output is detected when the cell trips sense circuitry, allowing for accurate state determination by adjusting the ADC output based on reference cell conductivity, thereby reducing sensing time and errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a voltage ramp is applied to sense memory cell states, then sensing speed is improved, but measurement precision deteriorates due to variations in ramp rate and distortions
Solution Approach 1:
The patent applies preliminary compensation actions by adjusting the ADC reference voltage or calibration data before the actual sensing operation. This pre-adjustment compensates for expected ramp rate variations and distortions, allowing fast voltage ramp sensing without sacrificing measurement precision. The system performs calibration or reference measurements beforehand to establish compensation parameters that are applied during normal sensing operations.
2Measurement precision
If multiple discrete sensing potentials are applied to detect MLC states, then measurement precision is improved, but loss of time increases due to sequential sensing requirements
Solution Approach 1:
The patent merges the functions of multiple discrete voltage ramp generators into a single voltage ramp generator that can produce multiple ramp rates. This consolidation allows the system to perform what would traditionally require multiple sequential sensing operations using a single integrated circuit element, thereby reducing the time loss associated with switching between multiple discrete generators while maintaining the ability to detect multiple MLC states with appropriate precision.
3Productivity
If fast voltage ramp rates are used for sensing, then productivity is improved, but reliability deteriorates due to erroneous sensing results
Solution Approach 1:
The patent implements feedback mechanisms where the sensed data is verified and cross-checked against expected thresholds and relationships. The system uses the output from fast voltage ramp sensing to adjust subsequent sensing operations or to validate results through comparison with reference cells or previously stored calibration data. This feedback loop ensures that high-speed sensing maintains reliability by detecting and correcting erroneous results.
Solution Approach 2:
The patent changes the parameter of voltage ramp rate dynamically based on the sensing context. Rather than using a fixed fast ramp rate for all sensing operations, the system adjusts the ramp rate parameter according to the specific memory cell state being sensed, the required precision level, and feedback from previous sensing results. This adaptive parameter change allows the system to maintain high productivity when conditions permit while ensuring reliability when precision is critical.
Data Source
AI summary
The present disclosure includes methods, devices, modules, and systems for operating memory cells. One method embodiment includes applying a ramping voltage to a control gate of a memory cell and to an analog-to-digital converter (ADC). The aforementioned embodiment of a method also includes detecting an output of the ADC at least partially in response to when the ramping voltage causes the memory cell to trip sense circuitry.