Memory Cell Sidewall Composition for Programming Stress Resistance
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Solution Overview
Problem
The structural integrity and performance of self-selecting memory cells, particularly those with chalcogenide materials, are compromised due to the stress caused by voltage application during programming, leading to reduced durability and efficiency, especially when the storage elements have dimensions similar to other elements in the memory array.
Innovation Solution
Forming a sidewall region with a different composition and structure than the bulk region, using methods such as depositing a dielectric material or a contaminant layer, to enhance the structural integrity and resistivity of the memory cells, thereby protecting the bulk region and improving operational stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage is applied during programming of memory cells, then memory cells can be programmed to store information, but stress is caused that compromises structural integrity and performance
Solution Approach 1:
The patent applies local quality by creating a sidewall region with different material composition and properties than the bulk region. The sidewall region has higher resistivity and different mechanical properties to specifically withstand the stress from voltage application during programming, while the bulk region maintains its programming functionality. This localized differentiation protects the memory cell structure without interfering with the core storage function.
Solution Approach 2:
The memory cell storage element is segmented into two distinct regions: a sidewall region and a bulk region. The sidewall region is formed by depositing dielectric material or contaminant layers on the sides of the storage element, creating a structurally reinforced boundary layer that separates the stress-bearing function from the information-storage function performed by the bulk region.
2Manufacturing precision
If storage elements have dimensions similar to other elements in the memory array, then manufacturing consistency is maintained, but stress during programming reduces durability and efficiency
Solution Approach 1:
The patent maintains dimensional consistency across all memory cell elements while locally enhancing the sidewall region with different material properties. The sidewall region has increased resistivity and structural reinforcement compared to the bulk region, allowing elements to maintain uniform overall dimensions for manufacturing consistency while the localized sidewall modification provides enhanced durability against programming stress.
3Reliability
If sidewall region with different composition is formed, then structural integrity and resistivity are enhanced, but device complexity increases
Solution Approach 1:
The patent changes the material composition parameter of the sidewall region by depositing dielectric material or contaminant layers, creating a region with different resistivity and mechanical properties. This parameter change in the sidewall region enhances operational stability and structural integrity without fundamentally altering the core memory cell architecture or programming mechanism.
Solution Approach 2:
The sidewall region is formed through preliminary deposition of dielectric material or contaminant layers during the manufacturing process, before the memory cell is fully assembled and operational. This preliminary structural reinforcement is built into the device during fabrication, ensuring enhanced durability from the outset without adding complexity to the operational device structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The modified sidewall and bulk region configuration increases the structural integrity and performance of memory cells, reducing leakage and maintaining desired dimensions, thus enhancing the reliability and efficiency of the memory array.
Implementation Method 1
depositing a dielectric material or a contaminant layer to form a sidewall region
Data Source
AI summary
Methods, systems, and devices for techniques that support sidewall structures for memory cells in vertical structures are described. A memory cell may include a first electrode, a second electrode, and a self-selecting storage element between the first electrode and the second electrode. The self-selecting storage element may extend between the first electrode and the second electrode in a direction that is parallel with a plane defined by the substrate. The self-selecting storage element may also include a bulk region and a sidewall region. The bulk region may include a chalcogenide material having a first composition, and the sidewall region may include the chalcogenide material having a second composition that is different than the first composition. Also, the sidewall region may extend between the first electrode and the second electrode.