3D Memory Cell Programming for Asymmetrical Sub-Cell Sizes
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Solution Overview
Problem
Existing memory devices face challenges in optimizing and controlling memory cells with asymmetrical sizes, which affect integration and performance.
Innovation Solution
The memory device includes memory cells divided into first and second sub-memory cells of different sizes, with a control circuit to perform distinct program operations based on size information, using separate channels and controlling voltage distributions and program/erase windows for each type.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If one channel structure is divided into multiple channels to form memory cells, then integration degree of memory cells is increased, but sizes of memory cells become asymmetrical making optimization and control difficult
Solution Approach 1:
The patent segments the channel structure into multiple separate channels (first channel, second channel, third channel, fourth channel) rather than dividing a single channel. This segmentation allows each channel to form memory cells with consistent geometrical characteristics, maintaining symmetry while achieving high integration density. The segmentation principle resolves the contradiction by creating multiple independent structural units that can be uniformly controlled.
Solution Approach 2:
The patent applies local quality by configuring different channel structures in different regions of the memory device. Each channel is designed with specific geometrical characteristics suitable for its location, allowing optimization of memory cell sizes in different areas. This enables asymmetric memory cell configurations to be managed through localized structural design rather than global complexity.
2Quantity of substance
If memory cells are formed with different sizes to increase integration, then storage capacity is improved, but uniform control of program operations becomes difficult
Solution Approach 1:
The patent segments memory cells into distinct groups associated with different channels (first channel, second channel, third channel, fourth channel). Each channel serves as an independent control unit, allowing program operations to be applied uniformly to all memory cells within that channel. This segmentation enables differential control strategies for different channel groups, resolving the contradiction between varied cell sizes and uniform control.
Solution Approach 2:
The patent implements dynamic control by allowing different program operation parameters to be applied to different channel groups based on their specific characteristics. The control mechanism can adaptively adjust program voltages, pulse widths, and timing for each channel, enabling optimal programming of memory cells with different sizes while maintaining ease of operation through automated differential control.
Data Source
AI summary
A memory device may include a memory cell array including memory cells stacked in a direction perpendicular to a substrate, each of the memory cells including a first sub-memory cell and a second sub-memory cell having a size larger than a size of the first sub-memory cell, a sub-memory cell information storage configured to store sub-memory cell size information on the sizes of the first sub-memory cell and the second sub-memory cell, a peripheral circuit configured to perform a program operation on a selected sub-memory cell among the memory cells, and a control logic configured to control the peripheral circuit to store data in each of the first sub-memory cell and the second sub-memory cell based on the sub-memory cell size information.