Memory Cell Switch Driver Logic for Leakage Current Control
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Solution Overview
Problem
Integrated circuits, particularly in the automobile sector, face increased leakage currents with the transition from 40 nm to 28 nm technology, leading to higher energy consumption and challenges in implementing a low-energy mode while preserving data.
Innovation Solution
A memory cell device with a switch driver logic that enables a memory cell to operate in three states: on, off, and a conductive state with lower and higher conductivity than the on state, allowing for adjustable voltage levels and reduced peak currents during mode transitions, using a single switch or multiple switches connected in parallel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of memory cells is increased to double storage capacity, then storage capacity is improved, but leakage current increases leading to higher energy consumption
Solution Approach 1:
The memory array is divided into multiple banks, and each bank can be independently controlled by separate word lines and bit lines. This segmentation allows only the necessary memory banks to be activated during operation, reducing the total number of active memory cells and thereby reducing leakage current and energy consumption while maintaining overall storage capacity.
Solution Approach 2:
The patent implements dynamic power management by selectively activating or deactivating specific memory banks based on access patterns. Word lines and bit lines can be dynamically enabled or disabled, allowing the system to adapt power consumption to actual usage requirements, thus reducing energy waste in low-activity scenarios.
2Loss of energy
If a low-energy mode is implemented to reduce leakage current, then energy consumption is reduced, but data preservation becomes challenging
Solution Approach 1:
Before transitioning to low-energy mode, the patent performs preliminary actions such as writing data to backup storage locations or updating error correction codes. This preliminary preparation ensures that when power is reduced or banks are deactivated, data can be preserved or restored without loss, maintaining reliability during energy-saving operations.
Solution Approach 2:
The patent introduces intermediary structures such as backup storage cells, cache memory, or error correction code storage that act as mediators between the active memory banks and the low-energy state. These intermediaries hold critical data or correction information, allowing memory banks to be powered down while preserving data integrity through the intermediary storage.
3Adaptability or versatility
If multiple switches are used to provide three operating states, then power management flexibility is improved, but chip area increases
Solution Approach 1:
The patent designs switch circuits that can operate in multiple modes (high-power mode, low-power mode, and intermediate mode) using the same physical hardware. By making the switch circuit universal and multi-functional, the system achieves three distinct power management states without requiring separate dedicated switches for each mode, thereby reducing chip area while maintaining power management flexibility.
Solution Approach 2:
The patent achieves different operating states by changing parameters of existing switch circuits rather than adding separate switches. For example, by adjusting the gate voltage or control signals to the same switch, the system can transition between high-conductivity, low-conductivity, and intermediate-conductivity states, providing flexible power management without increasing chip area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces energy consumption, minimizes chip area requirements, and ensures data preservation by allowing flexible power management and reduced peak currents during mode transitions, thereby enhancing the efficiency of low-energy mode operations.
Implementation Method 1
The conductive state may be provided by means of a diode, for example by the first switch comprising a transistor which can be switched on for the on state and off for the off state, and which can be operated in a diode mode for the conductive state
Data Source
AI summary
In accordance with an embodiment, a memory cell device includes at least one memory cell; a first switch connected between the at least one memory cell and a reference potential node; a second switch connected between the at least one memory cell and the reference potential node, and switch driver logic adapted to put the first switch selectively into one of at least three operating states by activation or deactivation of a first subcircuit of the switch driver logic, wherein the at least three operating states comprises an on state, an off state, and a conductive state in which an electrical conductivity of the first switch is lower than in the on state and higher than in the off state, and put the second switch selectively into one of the at least three operating states by activation or deactivation of a second subcircuit of the switch driver logic.