Temperature-Based Memory Cell Refresh for Error Rate Control

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Solution Overview

Problem

Conventional memory systems experience increased error rates due to memory cells transitioning to a stable threshold voltage state, which is temperature-dependent, leading to inefficient use of error detection and correction resources and reduced performance.

Innovation Solution

Perform operations on memory cells at frequencies based on temperature to maintain them in a transient state, transitioning from a stable to a transient threshold voltage state to reduce error rates, using reset read operations and adjusting frequencies according to temperature.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory cells operate at conventional frequencies without temperature adjustment, then the memory system maintains standard operation speed, but error rates increase due to transition to stable threshold voltage state

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidoperation frequency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies dynamics by making the memory operation frequency variable rather than fixed. The frequency is dynamically adjusted based on real-time temperature monitoring and the transient state maintenance requirements. This allows the system to optimize between reliability (by maintaining transient state) and productivity (by adapting frequency to temperature conditions)

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameter (frequency) based on temperature conditions to maintain memory cells in a transient threshold voltage state. By adjusting frequency as a variable parameter in response to temperature changes, the system prevents error-prone stable states while adapting operational characteristics to environmental conditions

Inventive Principle:
Principle #35Parameter changes

2Reliability

If error detection and correction operations are performed frequently to handle high error rates, then data reliability is maintained, but system performance and productivity decrease

Engineering Contradiction:
Improveerror correction capabilityVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by proactively maintaining memory cells in a transient state through temperature-based frequency adjustment before errors can occur. This preventive approach avoids the need for frequent error detection and correction operations, thereby maintaining both reliability and productivity

Inventive Principle:
Principle #10Preliminary action

3Productivity

If memory operation frequency is increased to improve productivity, then data processing speed improves, but error rates increase due to insufficient time for transient state maintenance

Engineering Contradiction:
Improvedata processing speedVSAvoiderror rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent uses dynamics to adjust operation frequency based on temperature conditions that affect transient state maintenance. Rather than using a fixed high frequency that could cause errors, the system dynamically adapts frequency to ensure sufficient time for proper state transitions while maintaining high productivity when conditions allow

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP3750158B1Performing an operation on a memory cell of a memory system at a frequency based on temperature
Publication Date: 2025.12.10 MICRON TECHNOLOGY INC
  • EP3750158B1 patent drawingFigure 1
  • EP3750158B1 patent drawingFigure 2
  • EP3750158B1 patent drawingFigure 3

AI summary

A temperature associated with the memory component is determined. A frequency to perform an operation on a memory cell associated with the memory component is determined based on the temperature associated with the memory component. The operation is performed on the memory cell at the determined frequency to transition the memory cell from a state associated with an increased error rate for data stored at the memory cell to another state associated with a decreased error rate for the data stored at the memory cell.