Memory Cell Testing Access Credit and Copy Register
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Solution Overview
Problem
Existing methods for testing memory cells in integrated circuits are limited by the need for known stored information and do not effectively manage access to protect against unauthorized access and ensure reliable data storage and retrieval.
Innovation Solution
A processor-controlled method that allocates an access value and grants an access credit for memory access, allowing testing of memory cells only within a permissible value range, and uses signatures to verify data integrity without revealing stored information, thereby protecting against unauthorized access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory cells are tested by reading stored information and comparing with check codes, then functional capability can be detected, but data security is compromised because stored information must be known
Solution Approach 1:
The patent creates a copy of the memory area to be tested in a separate test register. The test register contains identical structure and initial values but is isolated from the original memory. Testing operations are performed on the copy rather than the original, allowing functional testing without exposing or modifying secret data in the original memory area.
Solution Approach 2:
The patent divides the memory system into separate functional segments: the original protected memory area and a separate test register. This segmentation allows independent testing of one component without affecting or exposing the other, resolving the conflict between testing needs and data security.
2Reliability
If multiple memory accesses are performed for testing, then comprehensive testing can be done, but unauthorized access risk increases and data integrity may be compromised
Solution Approach 1:
The patent introduces a test register as an intermediary between the testing mechanism and the original memory area. All test accesses are routed through this intermediary structure, which absorbs the stress of multiple read/write operations while protecting the original memory from direct access during testing.
Solution Approach 2:
The patent preemptively prevents unauthorized access by creating a protective barrier (test register) before any testing occurs. This preliminary protective structure is set up with the same initial state as the original memory, allowing comprehensive testing to be performed without any risk of compromising the original data.
3Ease of operation
If access credit is reduced by access value for each memory access, then access control can be enforced, but testing flexibility is reduced due to permissible value range constraints
Solution Approach 1:
The patent implements dynamic access credit management where the credit value can be adjusted based on testing requirements. The access credit mechanism is made adaptable by allowing the credit amount to be modified for different test scenarios, enabling both strict access control and flexible testing needs to be met through dynamic parameter adjustment.
Data Source
AI summary
A method for testing memory cells under test of an integrated circuit includes allocating an access value to a memory access and granting an access credit. If the access value of the memory access does not exceed the access credit, the memory access is performed and the access credit is reduced by the access value. The memory access is performed to one memory cell or at bit level to a plurality of memory cells. A processor is connectable to a memory having a plurality of memory cells. The processor is configured to test memory cells of a protected memory area of the memory by performing memory accesses at bit level, control a counting register in such a way that a value stored in the counting register is modified according to a number of performed memory accesses, and test memory cells of the protected memory area of the memory only if the value stored in the counting register lies within a permissible value range.