Semiconductor Memory Cell Equilateral Triangle Layout
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in maintaining uniform pitch and preventing reduction in conductive line pitch and width, leading to increased resistance and fabrication defects during the etching process.
Innovation Solution
The semiconductor memory device is designed with conductive lines and memory cells arranged in a configuration that forms equilateral triangles, ensuring a constant pitch in different directions, which allows for uniform etching and minimizes the reduction in conductive line pitch and width, thereby improving operating characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional rectangular grid arrangement is used, then layout simplicity is maintained, but pitch uniformity deteriorates leading to etching defects
Solution Approach 1:
The patent applies asymmetry by transitioning from a conventional symmetric rectangular grid arrangement to an asymmetric triangular arrangement. The memory cells are positioned at vertices of equilateral triangles, creating a non-rectangular pattern that achieves uniform pitch in multiple directions while preventing etching defects that occur in conventional rectangular layouts.
Solution Approach 2:
The patent introduces a new dimensional arrangement by using triangular geometry instead of rectangular geometry. The memory cells are arranged along lines parallel to the three sides of equilateral triangles, creating a multi-directional pattern that ensures constant pitch in different directions and improves etching uniformity.
2Productivity
If conductive line pitch is reduced to increase density, then storage capacity improves, but resistance increases and operating characteristics deteriorate
Solution Approach 1:
The patent changes the geometric parameters of the layout by adopting triangular arrangement with specific pitch relationships. The pitch between adjacent conductive lines is maintained constant through the triangular pattern, preventing resistance increase even as storage density improves through optimized cell arrangement.
3Ease of manufacture
If etching process is applied to conventional rectangular patterns, then fabrication is simplified, but pitch reduction and width loss occur leading to defects
Solution Approach 1:
The asymmetric triangular arrangement prevents the pitch reduction and width loss defects that occur in conventional rectangular patterns during etching. The equilateral triangle geometry creates uniform exposure and etching conditions in all directions, maintaining pitch consistency and preventing fabrication defects.
Data Source
AI summary
A semiconductor device includes: a plurality of first conductive lines and extending in a first direction different from a second direction, a third direction and a fourth direction, wherein the first direction is perpendicular to the fourth direction; a plurality of second conductive lines extending in the fourth direction to intersect the first conductive lines to form intersection regions and spaced apart from the plurality of first conductive lines; and a plurality of memory cells disposed relative to the first conductive lines and the second conductive lines so as to respectively overlap the intersection regions of the first conductive lines and the second conductive lines and arranged along lines that are parallel to the first direction, the second direction and the third direction, the plurality of memory cells respectively positioned at vertices of an imaginary equilateral triangle having three sides parallel to the first direction, the second direction, and the third direction, wherein each first conductive line overlaps the plurality of memory cells arranged in the first direction, and each second conductive line overlaps the plurality of memory cells displaced from one another in the fourth direction.