Memory Cell Programming with Analog-Digital Verify Pulses
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Solution Overview
Problem
Existing memory cell programming methods, such as selective slow programming convergence (SSPC), while improving threshold voltage distributions, incur additional time and complexity due to the need to apportion memory cells into different subsets for each programming pulse, and may result in some cells not reaching their intended threshold voltages.
Innovation Solution
Implementing an analog verification after one programming pulse and a digital verification after a subsequent pulse for each data state, with data line voltage levels adjusted based on current levels to efficiently program memory cells to their intended threshold voltages using one additional pulse, thereby mitigating errors and reducing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If selective slow programming convergence (SSPC) is used to improve threshold voltage distributions, then manufacturing precision is improved, but device complexity and loss of time increase due to the need to apportion memory cells into different subsets for each programming pulse
Solution Approach 1:
The patent extracts the verification function from the traditional programming process and implements it as a separate analog verification step that occurs after each programming pulse. This allows the system to determine which memory cells have reached their target threshold voltage without requiring complex apportionment logic, thereby reducing device complexity while maintaining manufacturing precision.
Solution Approach 2:
The patent implements feedback through analog verification after each programming pulse, where the measured threshold voltage of memory cells feeds back into the decision of whether to continue programming that cell. This feedback mechanism eliminates the need for complex apportionment strategies while maintaining precise control over threshold voltage distribution.
2Manufacturing precision
If selective slow programming convergence (SSPC) is used to improve threshold voltage distributions, then manufacturing precision is improved, but loss of time increases due to additional verification steps and cell apportionment
Solution Approach 1:
The patent performs preliminary analog verification after each programming pulse to determine which memory cells have reached their target threshold voltage before proceeding to the next programming pulse. This preliminary action prevents unnecessary programming cycles and reduces the total time required while maintaining precise threshold voltage distribution.
Solution Approach 2:
The patent maintains continuity of useful action by implementing analog verification that continuously monitors which memory cells need further programming. This allows the system to efficiently allocate subsequent programming pulses only to cells that haven't reached their target, eliminating wasted time on already-programmed cells while maintaining manufacturing precision.
3Device complexity
If traditional programming methods are used, then device complexity is reduced, but manufacturing precision deteriorates as some cells may not reach their intended threshold voltages
Solution Approach 1:
The patent implements self-service through analog verification that automatically determines which memory cells have reached their target threshold voltage. This self-verification mechanism eliminates the need for complex external control logic while ensuring that each memory cell receives programming pulses only until it reaches its intended threshold voltage, thereby improving manufacturing precision without significantly increasing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures that memory cells reach their desired threshold voltages efficiently, reduces the number of programming pulses required, and minimizes errors, thereby enhancing programming accuracy and reducing operational time.
Implementation Method 1
Changes in threshold voltage (Vt) of the memory cells, through programming (which is often referred to as writing) of charge storage structures (e.g., floating gates or charge traps) or other physical phenomena
Data Source
AI summary
Memories might include a controller configured to cause the memory to apply a programming pulse to a memory cell, perform an analog verify phase on the memory cell, in response to the analog verify phase, apply a first voltage level to a corresponding data line of the memory cell that is selected from a group consisting of an inhibit voltage level, a full enable voltage level, and an analog enable voltage level, apply a subsequent programming pulse to the memory cell, perform a digital verify phase on the memory cell, in response to the digital verify phase, apply a second voltage level to the corresponding data line of the memory cell that is selected from a group consisting of the inhibit voltage level and a digital enable voltage level, and apply a next subsequent programming pulse to the memory cell.