Variable Resistance Memory Cell Voltage Polarity Control
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Solution Overview
Problem
Existing semiconductor memory devices face a high likelihood of information loss in selected memory cells due to repeated reading actions, as the resistance level of the variable resistance element changes when subjected to the same readout voltage used for writing and reading, leading to decreased data storage reliability.
Innovation Solution
A semiconductor memory device design that applies different voltages with varying polarities during writing actions and a lower absolute readout voltage during reading, minimizing the resistance level change in selected memory cells, thereby reducing information loss and enhancing storage reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the same readout voltage is used for both writing and reading operations, then the reading operation can be performed, but the resistance level of the variable resistance element changes and information loss occurs
Solution Approach 1:
The patent applies different voltage parameters for writing and reading operations. Specifically, a first voltage is applied for writing operations to change the resistance level, while a second voltage (different from the first) is applied for reading operations. This parameter differentiation prevents the resistance level from changing during reading, thereby avoiding information loss while maintaining reading functionality.
2Ease of manufacture
If a high voltage is applied during writing operations to change resistance level, then writing can be performed, but repeated reading actions with the same voltage cause resistance level change and information loss
Solution Approach 1:
The patent establishes distinct voltage parameters for writing and reading operations. The first voltage (higher magnitude) is used for writing to effectively change the resistance level, while the second voltage (different magnitude and/or polarity) is used for reading. This parameter separation ensures that reading operations do not cause unwanted resistance changes, preventing information loss while maintaining effective writing capability.
3Productivity
If the variable resistance element is subjected to repeated readout voltages, then data can be read multiple times, but the resistance level changes and storage reliability decreases
Solution Approach 1:
The patent implements different voltage parameters for writing and reading operations. By applying a second voltage different from the first voltage during reading operations, the resistance level of the variable resistance element remains stable even during repeated reading actions. This parameter differentiation enables multiple reading operations without compromising storage reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces the likelihood of information loss during repeated read operations by using distinct voltage polarities and lower readout voltages, thereby improving data storage reliability in semiconductor memory devices.
Implementation Method 1
a variable resistance element having two terminals, that can store information by varying its electric resistan ce between a first state and a second state when voltage having different polarities are separately applied to both ends thereof
Data Source
AI summary
The possibility of the loss of information stored in a memory cell which is caused by repeating the reading action on the same memory cell comprising a variable resistance element and a select transistor can significantly be reduced. A voltage applying circuit for selecting one or more of the memory cells from a memory cell array and applying voltages to the word lines, bit lines, and source lines for programming, erasing, and reading information applies a voltage between the bit line and the source line connected to the selected memory cell so that the voltage applied between the two ports of the variable resistance element in the selected memory cell during the reading action is equal in the polarity to one of the voltages applied between the two ports of the variable resistance element for the programming action and the erasing action respectively whichever is greater in the absolute value.