Memory Cell Wear Tracking for Read Reliability

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Solution Overview

Problem

Flash memory devices, particularly in NAND architecture, face challenges in maintaining data read reliability due to degradation mechanisms that affect threshold voltage drift over time, leading to erroneous data reads and reduced memory cell performance as the number of program/erase cycles increases, without adequate tracking of wear cycles or age awareness.

Innovation Solution

Implementing a system where a memory access device determines and communicates wear cycle and wear state information to the memory device, allowing the control circuitry to adjust operating parameters such as programming pulse voltage, duration, and frequency to compensate for performance changes, thereby extending the useful life and reliability of memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of program/erase cycles increases, then memory cell programming capability is improved, but data read reliability deteriorates due to threshold voltage drift

Engineering Contradiction:
Improveprogramming capabilityVSAvoiddata read reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system implements feedback by monitoring the number of program/erase cycles and using this information to dynamically adjust read operation parameters. The memory access device receives wear cycle information and communicates adjusted read parameters back to the memory device, creating a closed-loop system that maintains read reliability despite increasing programming activity.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies parameter changes by modifying read operation parameters (such as read voltage levels or timing) based on the accumulated wear cycle count. As the memory device undergoes more program/erase cycles, the read parameters are adjusted to compensate for threshold voltage drift, thereby maintaining data read reliability throughout the device's operational life.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If wear cycle information is tracked and read parameters are adjusted, then data read reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata read reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary component - the memory access device - that handles the complexity of wear cycle tracking and parameter adjustment. Rather than embedding complex monitoring and adjustment circuitry within the memory device itself, the intermediary manages these functions externally, reducing the complexity burden on the memory device while still achieving improved read reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Duration of action of stationary object

If read parameters are dynamically adjusted based on wear state, then operational life is extended, but manufacturing precision requirements increase

Engineering Contradiction:
Improveoperational lifeVSAvoidmanufacturing precision
Core Design Contradiction:
Duration of action of stationary objectVSManufacturing precision

Solution Approach 1:

The system performs preliminary action by tracking wear cycles from the beginning of the memory device's operational life and proactively adjusting read parameters before significant threshold voltage drift occurs. This preventive approach extends operational life by maintaining read reliability throughout the device's lifespan, rather than waiting for performance degradation to manifest.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8984214B2Memory cell operation
Publication Date: 2015.03.17 MICRON TECHNOLOGY INC
  • US8984214B2 patent drawing
  • US8984214B2 patent drawing
  • US8984214B2 patent drawing

AI summary

The present disclosure includes memory devices and systems having memory cells, as well as methods for operating the memory cells. One or more methods for operating memory cells includes determining age information for a portion of the memory cells and communicating a command set for the portion of the memory cells, the command set including the age information.