Memory Cell Word-Line Control for Complementary Transistor Switching

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Solution Overview

Problem

Existing semiconductor devices face challenges in improving on/off characteristics of switch elements, leading to complex structures and increased power consumption when implementing memory cells with two switch elements, which can be turned on simultaneously during write and read operations.

Innovation Solution

A semiconductor device is designed with a memory cell comprising two complementary transistors connected to a single word line, allowing one transistor to be turned on during a write operation and the other during a read operation, reducing power consumption and maintaining retention characteristics without increasing the number of word lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If one memory cell is implemented with two switch elements to improve on/off characteristics, then the on/off characteristics are improved, but the number of word lines connected to the switch elements increases, making the structure complex

Engineering Contradiction:
Improveon/off characteristicsVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the control of two switch elements (first and second transistors) into a single word line connection. Both transistors share the same word line, allowing them to be controlled simultaneously through voltage application while maintaining complementary operation. This reduces the number of word lines from multiple to one, simplifying the structure while preserving improved on/off characteristics.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If one memory cell is implemented with two switch elements to improve on/off characteristics, then the on/off characteristics are improved, but the switch elements may be turned on simultaneously during write operation and read operation, increasing power consumption

Engineering Contradiction:
Improveon/off characteristicsVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies local quality by creating complementary transistor characteristics with different threshold voltages. The first transistor has a lower threshold voltage optimized for write operations, while the second transistor has a higher threshold voltage optimized for read operations. This local differentiation ensures that only the appropriate transistor activates during each operation type, preventing simultaneous activation and reducing power consumption.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the threshold voltage parameter of the transistors to achieve complementary behavior. By setting different threshold voltages for the first and second transistors, the system ensures that one transistor turns on during write operations while the other turns on during read operations. This parameter change enables selective activation, preventing simultaneous conduction and reducing power loss.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If the number of word lines is increased to control multiple switch elements, then the control capability is improved, but the structure becomes more complex and power consumption increases

Engineering Contradiction:
Improvecontrol capabilityVSAvoidstructure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent makes the single word line universal by designing it to perform multiple functions: controlling both the first transistor for write operations and the second transistor for read operations. Through complementary transistor characteristics with different threshold voltages, the same word line achieves selective control without requiring separate control lines, thereby maintaining versatility while reducing structural complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250393184A1Semiconductor device
Publication Date: 2025.12.25 SAMSUNG ELECTRONICS CO LTD
  • US20250393184A1 patent drawing
  • US20250393184A1 patent drawing
  • US20250393184A1 patent drawing

AI summary

A semiconductor device may include: a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines; a row decoder configured to control voltages on each of the plurality of word lines; and a sense amplifier circuit configured to control voltages on each of the plurality of bit lines. Each of the plurality of memory cells includes a pair of transistors. The row decoder is configured to provide a common control voltage to the pair of transistors included in a selected memory cell among the plurality of memory cells, through one select word line of the plurality of word lines, and a first transistor of the pair of transistors is turned on and a second transistor of the pair of transistors is turned off by the common control voltage.