Memory-Centric Dispatch Bypassing Address Checking
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Solution Overview
Problem
The processing overhead required for address checking in memory-centric commands, especially those that do not access memory, consumes valuable resources and reduces dispatch throughput in Processing In Memory (PIM) and Processing Near Memory (PNM) technologies.
Innovation Solution
Implementing an Address Check Bypass (ACB) bit to selectively bypass address checking for memory-centric commands that do not access memory and for commands with the same physical address as a prior memory-centric command that accessed memory, thereby reducing processing overhead and improving dispatch throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If address checking is performed for all memory-centric commands, then data correctness is ensured, but dispatch throughput is reduced due to unnecessary processing overhead
Solution Approach 1:
The patent applies local quality by differentiating the treatment of memory-centric commands based on their specific characteristics. Instead of uniform address checking for all commands, the system performs address checking selectively - bypassing it for commands that access only local registers and performing it only when necessary for commands accessing memory. This differentiated approach maintains data correctness where needed while improving throughput where address checking is unnecessary.
2Reliability
If address checking is performed for memory-centric commands accessing local registers, then data correctness is maintained, but processing resources are wasted
Solution Approach 1:
The patent extracts the address checking operation from the universal memory-centric command processing path. By identifying commands that access only local registers (which do not require address checking), the system removes this unnecessary processing step from those specific command paths. This extraction of the address checking operation eliminates wasted processing resources while maintaining correctness for commands that actually need it.
3Reliability
If address checking is performed for every memory-centric command, then cache coherence is ensured, but dispatch latency increases
Solution Approach 1:
The patent applies partial action by performing address checking only for the subset of memory-centric commands that actually access memory, rather than for all memory-centric commands. This partial application of address checking maintains cache coherence for necessary operations while avoiding the excessive action of checking commands that access only local registers, thereby reducing dispatch latency.
Data Source
AI summary
A technical solution to the technical problem of how to improve dispatch throughput for memory-centric commands bypasses address checking for certain memory-centric commands. Implementations include using an Address Check Bypass (ACB) bit to specify whether address checking should be performed for a memory-centric command. ACB bit values are specified in memory-centric instructions, automatically specified by a process, such as a compiler, or by host hardware, such as dispatch hardware, based upon whether a memory-centric command explicitly references memory. Implementations include bypassing, i.e., not performing, address checking for memory-centric commands that do not access memory and also for memory-centric commands that do access memory, but that have the same physical address as a prior memory-centric command that explicitly accessed memory to ensure that any data in caches was flushed to memory and/or invalidated.