Memory Change Log Compression for Faster Address Mapping Updates
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Solution Overview
Problem
Memory systems face performance issues due to frequent transfers of update information between volatile and non-volatile memory, leading to increased latency and reduced efficiency in maintaining up-to-date logical-to-physical address mappings.
Innovation Solution
Implementing flexible information compression at the change log within the memory system, allowing for the compression of sequentially indexed addresses and switching between operating modes to optimize data transfer, thereby reducing the frequency of updates to the physical page table and page validity table.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If frequent transfers of update information between volatile and non-volatile memory are performed to maintain up-to-date logical-to-physical address mappings, then the reliability of address mappings is improved, but the latency and transfer frequency increase reducing system performance
Solution Approach 1:
The patent extracts only the changed portions of the logical-to-physical address mapping information and stores them separately in a change log buffer, rather than transferring the entire mapping table. This allows the system to maintain reliable address mappings by tracking changes while minimizing data transfer volume, thus resolving the contradiction between reliability and performance.
Solution Approach 2:
The patent segments the address mapping information into two parts: the main logical-to-physical mapping table stored in non-volatile memory, and the change log buffer stored in volatile memory that contains only recent updates. This segmentation allows frequent updates to be handled efficiently in the small volatile buffer without requiring frequent transfers of the entire mapping table to non-volatile memory.
2Quantity of substance
If compression of sequentially indexed addresses is implemented in the change log, then the storage capacity is improved, but the device complexity increases
Solution Approach 1:
The patent changes the parameter representation of sequentially indexed addresses by storing only the starting address and the count of sequential entries rather than storing each address individually. This parameter change effectively increases the storage capacity for sequential data while the compression logic remains relatively simple, as it only requires detecting sequential patterns and applying the compact representation.
Data Source
AI summary
Methods, systems, and devices for flexible information compression at a memory system are described. For example, a memory system may compress information in a change log to reduce the frequency of transfers of one or more mappings between volatile memory and non-volatile memory. The memory system may compress information associated with a sequence of sequentially-indexed addresses by storing the information associated with those addresses at a pair of entries in the change log. The memory system may additionally switch between a first operating mode associated with identifying sequentially-indexed addresses and generating compressed entries, and a second operating mode associated with generating entries of the change log for each address received in commands.