Memory Device Channel Boosting Control for HCI Prevention
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Solution Overview
Problem
Existing memory devices face challenges in preventing hot-carrier injection (HCI) and soft erase during read operations and program verify operations, leading to reliability issues and increased power consumption.
Innovation Solution
A memory device with a control logic system that generates pre-pulse voltages for string select lines and ground select lines, allowing for selective input of pre-pulse voltages to unselected cell strings, and uses a row decoder to control channel boosting levels by selecting wordlines as barrier lines, thereby reducing channel potential and preventing HCI and soft erase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pre-pulse voltage is applied to all cell strings during read operations, then hot-carrier injection is prevented, but power consumption increases
Solution Approach 1:
The patent applies pre-pulse voltage selectively only to unselected cell strings during read operations, rather than uniformly to all cell strings. This localized application prevents hot-carrier injection in vulnerable unselected strings while avoiding unnecessary power consumption in already-selected strings, thereby resolving the contradiction between reliability improvement and power consumption reduction.
Solution Approach 2:
The patent segments the cell string population into selected and unselected groups, applying different voltage strategies to each segment. Unselected cell strings receive pre-pulse voltage to prevent hot-carrier injection, while selected cell strings proceed with normal read operations. This segmentation enables targeted protection where needed while minimizing overall power consumption.
2Measurement precision
If channel boosting is increased to improve read margin, then read accuracy improves, but hot-carrier injection and soft erase occur
Solution Approach 1:
The patent applies pre-pulse voltage to unselected cell strings before the main read operation to preemptively prevent hot-carrier injection and soft erase. This preliminary protective action allows the system to subsequently apply higher read voltages to selected cell strings for improved read margin without causing reliability issues, as the vulnerable unselected strings are already protected.
Solution Approach 2:
The pre-pulse voltage serves as a preliminary counter-action that neutralizes the potential harmful effects of channel boosting before they can occur. By applying this protective voltage in advance to unselected cell strings, the system can safely implement higher voltage read operations on selected strings to improve read margin while preventing the adverse effects through the preliminary anti-action mechanism.
3Reliability
If read voltage is increased to ensure accurate reading, then read reliability improves, but interference with adjacent cell strings increases
Solution Approach 1:
The patent applies different voltage conditions to different spatial groups of cell strings: high read voltage is applied locally to selected cell strings for accurate reading, while pre-pulse voltage is applied to unselected cell strings to prevent interference. This spatial differentiation of voltage application ensures read reliability through high voltage where needed while preventing harmful interference in adjacent unselected strings through the protective pre-pulse mechanism.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces power consumption, minimizes the occurrence of hot-carrier injection and soft erase, and enhances data reliability by controlling channel potentials during read operations and program verify operations.
Implementation Method 1
A memory device, including a memory cell array including a plurality of cell strings each including a plurality of memory cells, respectively connected between a plurality of string select lines and a plurality of ground select lines, and a plurality of wordlines connected to the plurality of memory cells
Implementation Method 2
a control logic configured to generate a first voltage that is provided to the plurality of string select lines, and a second voltage that is provided to the plurality of ground select lines, and to adjust each voltage level of the first voltage and the second voltage to control a channel boosting level of the plurality of cell strings
Implementation Method 3
a row decoder configured to provide a read voltage, a read pass voltage, the first voltage, and the second voltage to the memory cell array under control of the control logic
Data Source
AI summary
A memory device includes a memory cell array including cell strings, respectively connected between string select lines and ground select lines, and wordlines connected to memory cells, a control logic to generate a first voltage provided to the string select lines, and a second voltage provided to the ground select lines, and to adjust voltage levels of the first and second voltages to control a channel boosting level of the cell strings, and a row decoder to provide a read voltage, a read pass voltage, and the first and second voltages to the memory cell array under control of the control logic. The control logic generates one of the first and second voltage as a pre-pulse voltage. The row decoder provides a third voltage to at least one of the wordlines.