Semiconductor Memory Device Channel Clean Verify
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Solution Overview
Problem
Semiconductor memory devices face challenges in reducing erroneous reading of memory cells due to inter-cell interference effects and threshold voltage fluctuations during read and verify operations.
Innovation Solution
The semiconductor memory device employs a control circuit that executes write and read operations through multiple loops, including program and verify operations, with channel clean operations and sense operations to determine threshold voltage states, and adjusts the order and timing of sense operations to minimize inter-cell interference and ensure accurate reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple sense operations are performed in sequence during verify operations, then measurement precision of threshold voltage is improved, but inter-cell interference effects increase causing erroneous reading
Solution Approach 1:
A channel clean operation is performed before sense operations to reset the channel state by applying a reference voltage, preventing residual charges from previous operations from affecting subsequent measurements. This preliminary action eliminates inter-cell interference before the actual threshold voltage measurement begins.
Solution Approach 2:
The verify operation uses periodic sense operations with a specific sequence: channel clean operation, first sense operation, second sense operation, third sense operation. This periodic structure with reference voltage application stabilizes threshold voltage measurements while minimizing cumulative inter-cell interference effects through regular channel resetting.
2Stability of the object's composition
If channel clean operation is performed before sense operations, then threshold voltage stability is improved, but operation time increases
Solution Approach 1:
The channel clean operation applies a reference voltage for a predetermined time period that is sufficient to stabilize the channel state without being excessively long. This partial action approach achieves the necessary threshold voltage stability while minimizing the time penalty, balancing reliability and speed.
Data Source
AI summary
A semiconductor memory device includes a semiconductor pillar including first and second memory cells electrically connected in series and formed on opposite sides of the semiconductor pillar, first word lines connected to the first memory cells, respectively, and second word lines connected to the second memory cells, respectively. A verify operation includes a channel clean operation for supplying a reference voltage to a semiconductor channel shared by the first and second memory cells followed by at least first and second sense operation for determining whether a threshold voltage of a target memory cell has reached first and second threshold voltage states, respectively, then a second channel clean operation for supplying the reference voltage to the semiconductor channel, and then at least a third sense operation for determining whether the threshold voltage of the target memory cell has reached a third threshold voltage state.