Memory Channel Disablement for Reliability-Prone Chip Recovery
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Solution Overview
Problem
Existing approaches to handling reliability-prone memory chips in semiconductor memory devices often result in increased manufacturing costs and environmental impact by discarding these chips entirely, rather than utilizing their functional portions.
Innovation Solution
Implementing memory channel disablement techniques that allow a portion of a reliability-prone memory chip to be disabled, enabling operations through another channel, thereby incorporating the chip into the device while maintaining performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reliability-prone memory chips are discarded entirely, then manufacturing reliability is improved, but manufacturing yield and cost efficiency deteriorate
Solution Approach 1:
The memory chip is segmented into multiple independently functional channels. When reliability testing identifies a prone channel, only that specific channel is disabled while other channels remain operational. This segmentation allows the chip to be partially utilized rather than completely discarded, resolving the contradiction between reliability and manufacturing yield.
Solution Approach 2:
Instead of treating the entire memory chip as a uniform unit, the patent applies local quality control by assessing and disabling only the specific problematic channel(s) while preserving the functionality of other channels. This localized approach maintains overall chip reliability while maximizing usable capacity and yield.
2Reliability
If reliability-prone memory chips are discarded entirely, then product quality is improved, but manufacturing cost increases
Solution Approach 1:
The patent recovers value from reliability-prone memory chips by disabling only the problematic channels and utilizing the remaining functional channels. This recovery approach prevents complete discarding of chips that still have usable capacity, thereby reducing manufacturing costs while maintaining acceptable product quality.
3Productivity
If functional portions of reliability-prone chips are utilized, then manufacturing yield increases, but system complexity increases
Solution Approach 1:
The memory controller automatically performs reliability testing, identifies prone channels, and disables them without requiring complex external intervention. This self-service approach manages the complexity internally while allowing the system to benefit from higher manufacturing yield through partial chip utilization.
4Ease of manufacture
If memory channel disablement is implemented, then cost efficiency improves, but device complexity increases
Solution Approach 1:
The system dynamically adjusts channel configuration based on reliability testing results. The memory controller can adaptively enable or disable channels as needed, providing flexibility that simplifies the overall management of heterogeneous memory chips while improving cost efficiency through partial utilization of previously discarded chips.
Data Source
AI summary
An apparatus can include memory devices and a memory controller coupled to the memory devices via memory channels. The memory channels can disable a first memory channel associated with a first memory die in a respective memory chip of a memory device and perform a memory operation via a second memory channel involving a second memory die in the respective memory chip.