Continuous Memory Channel Layout for Drain Select Gate Turn-Off
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Solution Overview
Problem
Existing memory devices with vertically stacked memory cells face challenges in efficiently turning off the drain select gate during operation, which affects the performance, efficiency, and accuracy of memory operations.
Innovation Solution
The formation of a continuous channel for the source select gate, memory cells, and drain select gate, with the channel being thinner and/or having a different doping concentration for the drain select gate than for the memory cells and source select gate, facilitates easier control of the drain select gate during memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a continuous channel is formed for source select gate, memory cells, and drain select gate with uniform thickness, then the manufacturing process is simpler, but the drain select gate cannot be turned off efficiently during operation
Solution Approach 1:
The patent applies local quality by creating a channel with non-uniform thickness where the channel thickness varies at different locations. Specifically, the channel is thinner in the drain select gate region compared to the source select gate and memory cell regions, enabling localized control of electrical properties to facilitate turning off the drain select gate while maintaining proper operation elsewhere
Solution Approach 2:
The patent changes the physical parameter of channel thickness to resolve the contradiction. By modifying the channel thickness parameter locally in the drain select gate region, the electrical characteristics are altered to enable efficient turn-off capability without affecting the overall continuous channel structure
2Quantity of substance
If vertically stacked memory cells are implemented, then memory density increases, but control of select gates becomes more difficult
Solution Approach 1:
The patent addresses select gate control difficulty in vertically stacked memory by applying local quality through differentiated channel thickness. The channel is made thinner specifically in the drain select gate region, providing localized electrical control that enables efficient turn-off capability while maintaining the high-density vertical stacking architecture
Solution Approach 2:
The patent introduces dimensional variation in the channel structure by creating non-uniform thickness in the vertical stacking direction. This dimensional change allows for differentiated control of select gates while maintaining the compact vertical architecture, resolving the control difficulty without sacrificing memory density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the efficiency, performance, and accuracy of memory operations by making it easier to turn off the drain select gate, thereby improving the overall functionality of vertically stacked memory devices.
Implementation Method 1
forming a continuous channel for the source select gate, the memory cells, and the drain select gate
Data Source
AI summary
The present disclosure includes memory having a continuous channel, and methods of processing the same. A number of embodiments include forming a vertical stack having memory cells connected in series between a source select gate and a drain select gate, wherein forming the vertical stack includes forming a continuous channel for the source select gate, the memory cells, and the drain select gate, and removing a portion of the continuous channel for the drain select gate such that the continuous channel is thinner for the drain select gate than for the memory cells and the source select gate.