3D Memory Channel Structure With Dual Crystal Regions
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Solution Overview
Problem
Current semiconductor devices face challenges in increasing data storage capacity and reliability, particularly in reducing damage and defects in the channel structure, which affects performance and efficiency.
Innovation Solution
A semiconductor device with a gate stacking structure and channel structure is developed, featuring a polycrystalline region and a channel region with a different crystal structure, where the channel structure includes a polycrystalline semiconductor material and a single crystal or quasi-single crystal structure, respectively, formed through a process of solid-phase and metal-induced crystallization, reducing defects and enhancing connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a semiconductor layer with a single crystal structure is formed in the channel region, then cell current and device performance are improved, but manufacturing complexity and process difficulty increase
Solution Approach 1:
The semiconductor layer is divided into two distinct regions with different crystal structures: a polycrystalline region in the protruded portion and a single crystal region in the channel region. This segmentation allows each region to be optimized for its specific function while simplifying the overall manufacturing process compared to forming a complete single crystal layer throughout.
Solution Approach 2:
Different crystal structures are applied to different portions of the semiconductor layer based on functional requirements. The protruded portion uses polycrystalline structure for mechanical stability and ease of formation, while the channel region uses single crystal structure for optimal electrical performance and cell current.
2Ease of manufacture
If the channel structure is formed with a polycrystalline semiconductor material, then manufacturing ease is improved, but damage and defects in the channel structure increase
Solution Approach 1:
The patent applies different crystal structures to different regions: polycrystalline structure in the protruded portion where ease of manufacture is prioritized, and single crystal structure in the channel region where structural integrity and low defect density are critical for device reliability.
Solution Approach 2:
The semiconductor layer is segmented into a protruded portion and a channel region, each with optimized crystal structures. The protruded portion can be formed more easily as polycrystalline, while the channel region is specifically engineered as single crystal to minimize defects and damage.
3Quantity of substance
If three-dimensionally arranged memory cells are implemented, then data storage capacity is increased, but manufacturing process complexity increases
Solution Approach 1:
The patent transitions from two-dimensional planar memory cell arrangement to three-dimensional vertical stacking, increasing storage capacity by utilizing the vertical dimension. Multiple memory cells are stacked above each other, allowing higher density without proportionally increasing manufacturing complexity.
Solution Approach 2:
The three-dimensional memory structure is divided into distinct functional regions including gate stacking structures, channel structures with protruded portions, and semiconductor layers with different crystal structures. This segmentation enables modular manufacturing approaches that simplify the overall fabrication process despite the three-dimensional architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the reliability and performance of the semiconductor device by reducing damage and defects in the channel structure, increasing cell current, and enhancing overall device efficiency.
Implementation Method 1
a heat treatment process may be performed for crystallization of the preliminary semiconductor layer. In this case, a first region of the preliminary semiconductor layer may be crystallized to have a polycrystalline structure
Implementation Method 2
a second region of the preliminary semiconductor layer may be crystallized to have a single crystal structure or a quasi-single crystal structure
Data Source
AI summary
A semiconductor device includes a gate stacking structure, a channel structure, and a horizontal conductive layer. The gate stacking structure may include a plurality of gate electrodes and a plurality of insulation layers that are alternately stacked. The channel structure may be provided with an inner portion extending into the gate stacking structure and a protruded portion that protrudes from one surface of the gate stacking structure. The horizontal conductive layer may be connected to the protruded portion of the channel structure. In this case, the channel structure may include a semiconductor layer. The semiconductor layer may include a polycrystalline region in at least the protruded portion and including a polycrystalline semiconductor material and in a channel region positioned in the inner portion and having a crystal structure different from a crystal structure of the polycrystalline region.