Vertical Memory Channel Hole Etching to Prevent Sidewall Recess
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As the number of stacks of memory cells in semiconductor devices increases, forming a straight channel in the vertical direction becomes challenging, leading to potential leakage current due to recesses on the sidewalls of channel holes.
Innovation Solution
A method of manufacturing semiconductor devices involves alternately forming insulation and sacrificial layers to create a mold layer, followed by a dry etching process using a hard mask to form a channel hole and a recess on the sidewall of the sacrificial layer, which reduces the likelihood of recess formation on the mold layer's sidewall.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the thickness of the mold increases to accommodate more memory cell stacks, then the storage capacity increases, but the channel hole cannot be formed straight and recesses form on the sidewall
Solution Approach 1:
A recess formation layer is formed on the mold before the channel hole etching process. This preliminary structure modifies the etching process by causing positive ions to reflect upward from the recess, preventing them from reaching and damaging the mold sidewall, thus enabling straight channel holes even through thick molds
Solution Approach 2:
The recess formation layer acts as an intermediary between the etching process and the mold. It absorbs and redirects the positive ions generated during etching, serving as a protective mediator that prevents ion damage to the mold sidewall while allowing the channel hole to be formed straight
2Quantity of substance
If the channel hole is formed through a thick mold, then more memory cells can be stacked, but leakage current occurs due to recess formation on the mold sidewall
Solution Approach 1:
The recess formation layer is prepared in advance on the mold surface before etching. This preliminary structure creates a protective effect during etching that prevents direct ion bombardment of the mold sidewall, eliminating the source of leakage current while enabling high-stack configurations
Solution Approach 2:
The recess formation layer, which might seem like an unnecessary addition, actually converts the harmful effect of positive ion bombardment into a beneficial protective mechanism. The ions that would normally damage the mold sidewall are instead reflected upward by the recess, protecting the mold and preventing leakage current
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces or prevents leakage current from the gate electrode by minimizing recess formation on the sidewall of the mold layer, thereby enhancing the reliability of the semiconductor device.
Implementation Method 1
etching the sacrificial layer structure and the mold layer by a dry etching process
Implementation Method 2
the sacrificial layer structure including an etch stop layer and a second sacrificial layer sequentially stacked
Data Source
AI summary
In a method of manufacturing a semiconductor device, a first insulation layer and a first sacrificial layer are alternately and repeatedly formed on a substrate to form a mold layer. A sacrificial layer structure is formed on the mold layer to include an etch stop layer and a second sacrificial layer sequentially stacked. After forming a hard mask on the sacrificial layer structure, the sacrificial layer structure and the mold layer are etched by a dry etching process using the hard mask as an etching mask to form a channel hole exposing an upper surface of the substrate and form a recess on a sidewall of the second sacrificial layer adjacent to the channel hole. A memory channel structure is formed in the channel hole. The first sacrificial layer is replaced with a gate electrode.