3D Memory Channel Wiring Layout for Hydrogen Curing and Low Skew

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Solution Overview

Problem

Semiconductor devices face challenges in maintaining high data storage capacity and electrical characteristics due to damage from deposition, etching, and thermal processes, which degrade the memory channel's electrical properties.

Innovation Solution

The semiconductor device incorporates a dummy wiring structure that connects to the channel, allowing hydrogen to move through and cure polysilicon in the channel, improving electrical characteristics, and adjusts the wiring structure to reduce noise-induced skew, thereby enhancing performance and reducing costs and time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If deposition, etching, and thermal processes are used to form structures, then device functionality is achieved, but the memory channel structure is damaged and electrical properties are degraded

Engineering Contradiction:
Improvestructure formation capabilityVSAvoidchannel electrical properties
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces a dummy wiring structure that is formed before the harmful deposition, etching, and thermal processes. This dummy wiring serves as a protective element that prevents damage to the memory channel structure during subsequent manufacturing processes, thereby preserving electrical properties while allowing normal device fabrication to proceed

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If the wiring structure is adjusted to reduce noise-induced skew, then signal integrity is improved, but device complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidwiring structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a dummy wiring structure that acts as an intermediary element between the functional wiring and the noise source. This dummy wiring absorbs or shields against noise-induced skew without requiring complex modifications to the existing wiring architecture, thereby improving signal integrity while maintaining relatively simple device structure

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively secures the electrical characteristics of the channel and reduces noise-induced skew, improving the semiconductor device's performance and efficiency while minimizing additional costs and time required for modifications.

Implementation Method 1

allowing hydrogen to move through and cure polysilicon in the channel

Methodology Applied
Scientific EffectHydrogen diffusion: Diffusion

Data Source

PatentEP4255149A1Semiconductor device and massive data storage system including the same
Publication Date: 2023.10.04 SAMSUNG ELECTRONICS CO LTD
  • EP4255149A1 patent drawingFigure 1
  • EP4255149A1 patent drawingFigure 2
  • EP4255149A1 patent drawingFigure 3

AI summary

A semiconductor device includes a CSL driver on a substrate (100), a CSP (240) on the CSL driver, a gate electrode structure (752, 754, 756) on the CSP and including gate electrodes spaced apart from each other in a first direction (D1) perpendicular to an upper surface of the substrate, each of the gate electrodes extends in a second direction (D2, D3) parallel to the upper surface of the substrate, a memory channel structure (462) on the CSP and extending through the gate electrode structure and is connected to the CSP, a first upper wiring structure (684) contacting an upper surface of the CSP, a first through via (644) extending through the CSP in the first direction and is electrically connected to the first upper wiring structure and the CSL driver but does not contact the CPS, and a dummy wiring structure (639, 669, 689, 709, 729) contacting the upper surface of the CSP but is not electrically connected to the CSL driver.