3D Memory Channel Segmentation for Independent Read and Erase Control
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving improved operational reliability and manufacturing efficiency, particularly in the design and integration of three-dimensional memory strings within semiconductor devices.
Innovation Solution
The semiconductor device incorporates a source line with a channel pattern and pillar parts, a well structure, and a source contact structure, along with insulating spacers and gate stacks, allowing for enhanced control over read, program, and erase operations by separating the well structure from the source line, thereby improving operational reliability and manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the well structure is integrated with the source line in conventional three-dimensional memory devices, then the device structure is simpler, but the operational reliability and control over read/program/erase operations are limited
Solution Approach 1:
The patent divides the previously integrated well structure and source line into separate components. The well structure is positioned adjacent to and separated from the source line, with the channel layer extending between them. This segmentation allows independent control of read operations (through the source line) and erase operations (through the well structure), improving operational reliability while maintaining a manageable device structure.
2Ease of operation
If conventional integration methods are used for memory strings, then the manufacturing process is straightforward, but the control over read, program, and erase operations is insufficient
Solution Approach 1:
The patent segments the memory string structure into distinct functional regions: the source line, the well structure, and the channel layer extending between them. This segmentation enables independent electrical control of read operations (via the source line) and erase operations (via the well structure), significantly improving ease of operation. The manufacturing process is enhanced through systematic formation of these separated structures using standard semiconductor fabrication techniques.
3Reliability
If the source contact structure passes through the connection part, then the electrical connection is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent forms the connection part of the channel layer as a distinct structure that extends between the source line and the well structure before forming the source contact structure. This preliminary formation of the connection part creates a predefined pathway that guides the subsequent formation of the source contact structure, ensuring proper alignment and electrical connection while managing manufacturing precision requirements through systematic process sequencing.
Data Source
AI summary
A semiconductor device and a method of manufacturing a semiconductor device may be provided. The semiconductor device may include a source line formed over a substrate. The semiconductor device may include a channel pattern including a connection part disposed over the source line, and pillar parts protruding from the connection part in a first direction. The semiconductor device may include a well structure protruding from the connection part in the first direction and spaced apart from the source line. The semiconductor device may include a source contact structure protruding from the source line in the first direction and passing through the connection part. The semiconductor device may include a gate stack disposed between the source contact structure and the well structure and enclosing the pillar parts over the connection part.