3D Memory Channel Thickness Control via Segmented Insulating Films
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Variations in manufacturing processes lead to inconsistencies in dimensions of components in three-dimensional memory devices, affecting the reliability and performance by causing variations in cell current and threshold voltage.
Innovation Solution
A semiconductor device structure featuring a substrate with alternating stacks of electrode and insulating layers, where a single-crystal semiconductor column with a tubular shape is formed, surrounded by insulating films, and tunnel insulating films are divided to enhance the electric field and cell current, while charge storage and block insulating films are strategically positioned to prevent memory hole narrowing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional manufacturing processes are used for three-dimensional memory devices, then production can proceed with standard methods, but variations in component dimensions occur leading to inconsistent cell current and threshold voltage
Solution Approach 1:
The patent segments the memory hole formation process into multiple controlled steps: forming the memory hole, depositing the channel semiconductor layer, and forming the core insulating film. This segmentation allows each step to be optimized independently, with the core insulating film serving as a reference structure that ensures consistent channel layer thickness throughout the memory hole, thereby reducing dimension variations and improving reliability.
2Reliability
If the channel semiconductor layer thickness is not precisely controlled, then manufacturing is simpler, but cell current and threshold voltage vary significantly
Solution Approach 1:
The core insulating film serves as a self-referencing structure that automatically ensures consistent channel semiconductor layer thickness. The channel layer is deposited conformally on the core insulating film, which provides a fixed geometric reference. This self-service mechanism eliminates the need for complex external control systems to maintain thickness consistency, achieving high reliability without excessive manufacturing complexity.
3Manufacturing precision
If memory hole diameter varies, then manufacturing is easier with less control, but channel semiconductor layer thickness becomes inconsistent
Solution Approach 1:
The patent applies local quality by forming the core insulating film with specific dimensional characteristics within the memory hole structure. This localized reference structure provides a consistent basis for channel layer deposition, ensuring that even if the overall memory hole diameter varies, the channel layer thickness remains consistent where it contacts the core insulating film. This allows easier manufacturing with less stringent memory hole diameter control while maintaining precision where it matters.
Data Source
AI summary
A semiconductor device comprises a substrate. A plurality of electrode layers and a plurality of insulating layers are formed in an alternating stack above the substrate. A semiconductor column extends through the plurality of electrode layers and the plurality of insulating layers. The semiconductor column comprises a single-crystal semiconductor material on an outer peripheral surface facing the electrode and insulating layers. First insulating films are formed between the semiconductor column and the electrode layers. The first insulating films are spaced from each other along the column length. Each first insulating film corresponds to one electrode layer. A charge storage layer is between each of the first insulating films and the electrode layers. A second insulating film is between the charge storage layer and each of the electrode layers.


