Memory Subsystem Charge-Loss Tracking for Fewer Calibrations
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Solution Overview
Problem
Existing memory sub-systems fail to adequately address temporal voltage shift (TVS) in memory cells, leading to inefficient calibration operations that impact performance and power consumption.
Innovation Solution
A memory sub-system controller tracks charge loss by accumulating threshold voltage offsets based on time and environmental conditions, reducing the frequency of calibration operations by associating blocks into families and applying bin-specific read offsets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If frequent calibration operations are performed to address temporal voltage shift, then read accuracy is maintained, but power consumption increases and performance deteriorates
Solution Approach 1:
The system performs preliminary tracking of threshold voltage offsets by accumulating environmental condition data (temperature, humidity) and time information continuously, even before calibration is needed. This allows the system to prepare compensation parameters in advance and perform calibration only when necessary, reducing unnecessary calibration operations and associated power consumption while maintaining read accuracy.
Solution Approach 2:
The system implements feedback mechanisms by continuously monitoring environmental conditions and time, accumulating offset data, and using this information to dynamically adjust read thresholds. The feedback loop compares current environmental conditions with historical data to determine when calibration is actually needed, preventing frequent unnecessary calibrations that would waste power while ensuring accuracy when required.
2Reliability
If frequent calibration operations are performed to maintain read accuracy, then data integrity is preserved, but productivity decreases
Solution Approach 1:
The system accumulates environmental condition data and time information continuously in the background, performing preliminary tracking of voltage offsets before they affect data integrity. This allows the system to maintain data integrity through proactive compensation rather than reactive calibration, eliminating the need for frequent calibration operations that would reduce productivity.
Solution Approach 2:
The system performs self-adjustment by automatically tracking and compensating for threshold voltage shifts using accumulated environmental and temporal data. The memory sub-system controller autonomously determines when calibration is needed based on tracked offset accumulation, eliminating the need for external intervention and reducing operational interruptions that would impact productivity.
3Productivity
If blocks are associated into families with bin-specific read offsets, then calibration frequency is reduced, but device complexity increases
Solution Approach 1:
The system segments the memory device into blocks organized into families, with each family assigned specific read offsets based on their environmental condition profiles. This segmentation allows the controller to manage calibration more efficiently by treating families differently rather than uniformly, reducing overall calibration frequency while the organized structure helps manage the increased complexity through systematic categorization.
Solution Approach 2:
The system changes operational parameters by introducing bin-specific read offsets that vary based on accumulated environmental conditions and time. Instead of using a single fixed read threshold, the system dynamically adjusts parameters based on tracked offset accumulation, which reduces calibration frequency. The parameter changes are managed through structured data tables that map environmental conditions to appropriate offsets, helping organize the complexity.
Data Source
AI summary
Disclosed is a system that comprises a memory device and a processing device, operatively coupled with the memory device, to perform operations that include computing an adjustment value of a threshold voltage offset associated with a plurality of blocks of the memory device; determining that the adjustment value satisfies a threshold voltage criterion, wherein the threshold voltage criterion comprises a reference voltage level corresponding to known valley margins of the memory device; and updating the threshold voltage offset.