Memory Device Check Data Groups for Multi-Error Correction
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Solution Overview
Problem
Existing RAID technologies in memory devices face challenges in enhancing error correction capabilities to improve data reliability and safety.
Innovation Solution
The implementation of a memory device with a first memory region storing first check data, which is generated through multiple different coding equations applied to data stored in corresponding page rows. This allows for improved error correction capabilities by generating check data that can correct multiple errors using linearly independent equation coefficient matrices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional RAID check data generation methods are used, then storage capacity is maintained, but error correction capability is limited
Solution Approach 1:
The patent divides the check data into multiple groups, where each group corresponds to a specific set of page rows. This segmentation allows different coding equations to be applied to different groups, enabling targeted error correction for multiple errors while maintaining manageable complexity in each individual group's correction logic.
Solution Approach 2:
The patent introduces a new dimension of error correction by applying multiple different coding equations (beyond the traditional single XOR equation) to generate check data groups. This dimensional expansion in the coding space enables the system to correct multiple simultaneous errors that would be impossible with traditional single-equation RAID approaches.
2Reliability
If multiple different coding equations are applied to generate check data, then error correction capability is enhanced, but check data storage requirements increase
Solution Approach 1:
The patent merges multiple coding equations into a unified check data structure where groups of check data collectively provide multi-error correction capability. By organizing check data into groups that correspond to specific page row sets and applying different coding equations to each group, the system achieves enhanced error correction without requiring a proportional increase in total check data storage.
Solution Approach 2:
The check data structure is designed to serve multiple functions: each group of check data can correct errors in its corresponding page rows while the collective groups provide multi-error correction across the entire data set. This multi-functionality allows the same check data storage to handle both single-error and multi-error scenarios efficiently.
Data Source
AI summary
Examples of the present disclosure provide a memory device, a memory system and an operation method thereof. The memory device includes: at least one memory die, and a first memory region comprising a plurality of pages and configured to: store first check data, wherein the first check data comprises a plurality of groups of check data; each of the plurality of groups of check data corresponds to a plurality of page rows in each of designated word lines, the designated word lines comprising multiple word lines without an interval or with a fixed interval; and each group of check data is obtained from data stored in corresponding page rows and a plurality of different coding equations.