Memory Chip Redundancy Repair Using Logic-Die Row Remapping
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Solution Overview
Problem
The deployment of complex circuits for switching row selection signals in memory chips to replace failed rows results in a large product size, complicating the manufacturing process and increasing the chip's physical dimensions.
Innovation Solution
Implement a redundancy replacement mechanism using redundant rows in the memory chip, where the repair apparatus on the logic die manages the switching of row selection signals, simplifying the store die circuitry and reducing its physical size without compromising storage capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex circuits for switching row selection signals are deployed on store die to replace failed rows, then repair functionality is achieved, but product size increases
Solution Approach 1:
The patent extracts the row selection signal switching logic from the store die and relocates it to the logic die. The repair apparatus on the logic die generates replacement row selection signals based on failed row addresses, eliminating the need for complex switching circuits on the store die while maintaining full repair functionality.
Solution Approach 2:
The patent introduces an intermediary repair apparatus on the logic die that mediates between the failed row identification and the row selection signal generation. This intermediary component processes the failed row addresses and generates appropriate replacement signals, simplifying the store die architecture.
2Reliability
If logically complex circuit for switching row selection signal is deployed, then failed row replacement is enabled, but device complexity increases
Solution Approach 1:
The complex switching circuit logic is extracted from the store die and consolidated on the logic die. The repair apparatus there handles all row selection signal switching operations, reducing the store die to simpler memory cell structures without complex control logic.
Solution Approach 2:
The repair apparatus on the logic die serves multiple functions: it identifies failed rows, generates replacement row selection signals, and manages the redundancy replacement process. This multi-functional approach consolidates complexity in a single location rather than distributing it throughout the store die.
Data Source
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AI summary
A storage unit access method, a storage unit repair method, a die and a memory chip are provided. The method includes receiving an access request that includes an access address, where the access address includes an original address of at least one storage unit in a storage apparatus (S101); identifying, based on global repair information, whether a failed unit exists in the storage unit to which the access address points, where the global repair information includes original addresses of all failed units and a redundant address of a redundant unit configured to replace each failed unit (S102); when it is identified that a first failed unit exists, replacing an original address that is in the access address and that points to the first failed unit with a redundant address of a first redundant unit corresponding to the first failed unit (S 103); and sending an access request obtained after replacing the original address with the redundant address (S 104).