Memory Chip Test-Pad Access Control for Data Security

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Test pads on non-volatile memory chips pose significant data security risks, allowing unauthorized access and potential attacks, such as data cloning and implanting backdoor programs, which can compromise critical systems.

Innovation Solution

Implementing an access control unit with internal logic and secure protocols to manage access to non-volatile memory via test pads, using replay-protected communication and a reserved byte to authenticate commands, and control the connection between test pads and memory chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If test pads are directly connected to memory pads to facilitate testing and manufacturing, then ease of manufacture and testing is improved, but data security deteriorates due to vulnerability to cloning and backdoor implantation

Engineering Contradiction:
Improveease of manufactureVSAvoiddata security
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

An access control unit is introduced as an intermediary component between the test pads and the non-volatile memory. This mediator unit includes a switch that can be controlled to connect or disconnect the test pads from the memory pads, allowing secure conditional access while maintaining the simplicity of direct connection during manufacturing and testing phases

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If access control unit with switch is introduced to manage test pad connectivity, then data security is improved, but device complexity increases

Engineering Contradiction:
Improvedata securityVSAvoiddevice complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The access control unit incorporates a switch that can dynamically change its state between connected and disconnected. This dynamic component allows the system to adapt its security posture based on operational requirements, providing secure access when needed while maintaining simplicity during manufacturing and testing phases

Inventive Principle:
Principle #15Dynamics

3Object-affected harmful factors

If replay-protected communication protocols and authentication mechanisms are implemented, then data security is improved, but ease of operation deteriorates due to additional authentication steps

Engineering Contradiction:
Improvedata securityVSAvoidease of operation
Core Design Contradiction:
Object-affected harmful factorsVSEase of operation

Solution Approach 1:

The system performs preliminary authentication actions by establishing secure communication channels and validating commands before allowing access to the non-volatile memory. The access control unit authenticates commands and manages the connection state in advance, ensuring security is built-in rather than added as an afterthought

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12411619B2Memory chip test pad access management to facilitate data security
Publication Date: 2025.09.09 MICRON TECHNOLOGY INC
  • US12411619B2 patent drawing
  • US12411619B2 patent drawing
  • US12411619B2 patent drawing

AI summary

A system for providing memory chip test pad access management to facilitate data security is disclosed. A host issues a command to access a non-volatile memory of a memory chip system via a test pad. A controller acknowledges the command by transmitting a response to the host to authenticate the host for access. The host then issues an authenticated command to modify a reserved byte of a protected memory partition of the non-volatile memory. The controller responds to the authenticated command and the reserved byte is modified. Firmware of the memory chip system monitors the modification of the reserved byte and notifies the memory chip system to activate a switch in an access control unit controlling access to the non-volatile memory. The switch is then activated, thereby closing a circuit to connect the test pad with the non-volatile memory. The host then access the non-volatile memory via the test pad.