Memory Circuit Bank Voltage Control for Static Power Reduction
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Solution Overview
Problem
In memory circuits, wasteful static power consumption occurs due to supply voltage being applied to non-selected cells during store operations, leading to increased occupancy area of power switches and larger peripheral circuits, as existing solutions fail to optimize spatial and temporal granularity of power gating.
Innovation Solution
A memory circuit design where cells are grouped into banks, with a controller managing voltage supply to each bank, setting a lower voltage for non-active banks to reduce power consumption and occupancy area, and using a switch connected in series with the non-volatile element to control power supply to the bistable circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If supply voltage is applied to all cells during store operation, then store operation can be performed, but static power consumption increases
Solution Approach 1:
The cell array is divided into multiple banks, allowing selective voltage supply to only the bank containing the selected cell during store operation. This segmentation enables the controller to apply voltage to one bank while keeping other banks in low-power state, resolving the contradiction between performing store operation and reducing static power consumption.
Solution Approach 2:
Different voltage states are applied to different banks: the active bank receives full supply voltage for store operation, while inactive banks receive reduced or zero voltage to minimize power consumption. This local quality differentiation allows the system to maintain store operation capability while reducing overall static power consumption.
2Reliability
If power switch size is increased to maintain virtual power-supply voltage during store operation, then voltage stability is improved, but occupancy area increases
Solution Approach 1:
The power supply control is segmented by bank, with each bank having its own power switch. This allows the use of smaller power switches for each bank while collectively providing the same total power supply capability, reducing the occupancy area of individual power switches while maintaining voltage stability during store operation.
3Loss of energy
If conventional PG is used, then static power can be reduced, but information retention in memory circuit is lost
Solution Approach 1:
The system dynamically switches between different power states (full voltage, reduced voltage, zero voltage) based on operational requirements and data retention needs. During store operations, voltage is supplied; during idle periods, voltage is reduced or cut off. The non-volatile element ensures data persistence across these dynamic power states, resolving the contradiction between static power reduction and information retention.
Solution Approach 2:
The power supply voltage parameter is changed dynamically based on operational mode: full voltage during active operations, reduced voltage during standby with data retention requirement, and zero voltage during deep standby. The non-volatile element maintains data integrity across these parameter changes, enabling static power reduction without information loss.
Data Source
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AI summary
Provided is a memory circuit including: a plurality of cells arranged in a plurality of rows and a plurality of columns so that the plurality of rows are grouped to form a plurality of banks each including one or more rows, each of the plurality of cells including: a bistable circuit configured to store data; and a non-volatile element configured to store data stored in the bistable circuit in a non-volatile manner and to restore data stored in a non-volatile manner to the bistable circuit; and a controller configured to: perform a store operation on each of the plurality of rows in turn; set a voltage supplied, as a power-supply voltage, to cells in a first bank of the plurality of banks to a first voltage, the first bank including a row on which the store operation is performed; and set a voltage supplied, as a power-supply voltage, to cells in a bank of the plurality of banks other than the first bank to a second voltage that is less than the first voltage but at which data in the bistable circuit is retained.