Multi-Mode Memory Circuit for Idle-Time Computing Offload
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Solution Overview
Problem
Memory controllers in existing systems are burdened with heavy computational tasks, affecting the performance and efficiency of memory systems.
Innovation Solution
A memory system with a multi-mode circuit that provides additional computing services when idle, reducing the processor's burden by utilizing its data computing and processing capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the processor handles all computing tasks including encryption, decryption, error correction, and data randomization, then the functionality is complete, but the processor burden increases and system efficiency decreases
Solution Approach 1:
The patent segments the computing tasks by separating them into two categories: main functional services (normal access operations) handled by the processor, and additional functional services (encryption, decryption, error correction, data randomization) handled by the multi-mode circuit. This segmentation reduces the processor burden while maintaining complete functionality through the multi-mode circuit's capabilities.
2Device complexity
If the multi-mode circuit is used only for main functional services, then the processor remains simple, but the circuit utilization is low and resources are wasted
Solution Approach 1:
The multi-mode circuit is designed with multi-functionality to handle both main functional services (normal access operations) and additional functional services (encryption, decryption, error correction, data randomization). This allows the circuit to be universally utilized for various computing tasks, improving resource utilization while keeping the processor relatively simple.
3Reliability
If the memory controller manages all memory functions including ECC check, bad block management, address mapping, and wear leveling, then the memory device operates reliably, but the controller complexity and processing burden increase
Solution Approach 1:
The patent extracts certain computational functions (encryption, decryption, error correction, data randomization) from the processor and implements them in the multi-mode circuit. This extraction reduces the controller's processing burden and complexity while maintaining reliable memory operation through the dedicated circuit capabilities for these functions.
Data Source
AI summary
The present application describes memory systems, hosts, electronic devices and operation methods, and computer-readable storage media. An example memory system includes: a memory device; a multi-mode circuit having data computing and processing capabilities and configured to: provide a main functional service when in a busy state, and provide an additional functional service when in an idle state, the main functional service including implementation of normal access operations to data stored in the memory device, the additional functional service including implementation of computing services other than the normal access operations to the data stored in the memory device; and a processor coupled to the memory device and the multi-mode circuit and configured to control the memory device and the multi-mode circuit.