Memory Circuit Disturb Refresh Using Shared Count Array
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Solution Overview
Problem
Existing methods for handling 'drain disturb' in non-volatile memory systems, such as flash memories, require significant memory storage for count implementation and result in reduced write speed and shortened lifespan due to frequent recopying and refreshing processes.
Innovation Solution
A memory circuit and method that selectively rewrite memory areas based on control values associated with each area, using a single bit (DH bit) to determine which areas are refreshed, thereby reducing the need for extensive memory storage and optimizing write speed by only rewriting 'useful' areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If explicit count storage is implemented in every separately programmable area to track programming operations, then data integrity is maintained through accurate disturbance tracking, but memory capacity is reduced due to the requirement of several percent of memory field for storing counts
Solution Approach 1:
The invention extracts the count storage function from individual memory areas and consolidates it into a shared count array structure. Instead of dedicating 16-32 bits per memory area, a single shared count array stores disturbance counts for all areas, reducing total memory overhead while maintaining tracking capability for each area.
Solution Approach 2:
The shared count array serves multiple memory areas simultaneously, with each entry in the array corresponding to a specific memory area. This universal structure allows one data structure to track disturbance counts across the entire memory sector, eliminating the need for separate count storage in each area.
2Reliability
If explicit count storage and searching is implemented to identify areas needing refresh, then accurate disturbance tracking is achieved, but operation time increases due to the requirement of searching and evaluating all counts within a sector
Solution Approach 1:
The invention segments the memory sector into multiple areas, each with an associated disturbance count entry in the shared array. This segmentation allows the refresh operation to target only specific areas that exceed the disturbance threshold, rather than requiring evaluation of all areas, thus reducing refresh operation time while maintaining accurate tracking.
3Reliability
If high reprogramming probability is selected to ensure timely refresh of data, then data loss probability is reduced, but write speed is heavily reduced due to frequent recopying processes
Solution Approach 1:
The invention implements feedback through disturbance count tracking, where each programming operation increments the count for the affected area. The refresh operation uses this feedback to identify only those areas where the count exceeds a threshold, enabling selective refresh rather than blanket recopying. This reduces unnecessary write operations and preserves write speed while preventing data loss.
4Reliability
If high recopying rate is selected to prevent data loss, then data integrity is maintained, but memory lifespan is significantly decreased due to the reduction of remaining residual life time with each write process
Solution Approach 1:
The invention applies partial action by performing refresh operations only on memory areas that have exceeded the disturbance threshold, rather than recopying entire sectors or using high probability blanket refreshes. This selective approach maintains data integrity for at-risk areas while minimizing unnecessary write operations that would reduce memory lifespan.
Data Source
AI summary
A memory circuit having a plurality of memory areas, whose order depends on respectively associated logical addresses, and which each have an associated control value, and a control means, which is designed such that the same assigns a value to a control value associated with a target memory area when writing into the same, which corresponds to the value of a lowest used memory area, when one exists, and assigns the same an arbitrary or predetermined value, when none exists, and when a predetermined condition is fulfilled, and when at least two used memory areas exist, rewrites the content of a next memory area, whose control value has a predetermined relation to the control value of the lowest memory area, and changes the control value of this memory area, when the same exists, or rewrites a content of the lowest memory area and changes the associated control value, when the next memory area, whose control value has a predetermined relation to the control value of the lowest memory area, does not exist.