Memory Circuit Sensing Using Reference Current
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Solution Overview
Problem
Analog multi-stage sensing circuits in memory devices face limitations in sensing speed, area efficiency, and scalability due to large 'dummy' capacitors and non-reversible reference active branches, which increase silicon area and sensitivity to process variations, making them inefficient for high-density memory architectures.
Innovation Solution
The implementation of a memory circuit with a symmetrical configuration using a reference current between an active and an inactive memory device, where both devices are the same type, allowing for scalable and reversible operation, reducing the need for additional capacitance and enhancing noise immunity through the use of a current sensing device and a latch-type configuration with tri-stated outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If analog multi-stage sensing circuits are used, then sensing capability is improved, but sensing speed is limited and power consumption increases significantly
Solution Approach 1:
The patent replaces the analog multi-stage sensing circuit with a digital sensing approach using a sense amplifier that directly amplifies voltage differences. This substitution of analog stages with a digital voltage-based sensing mechanism eliminates the speed limitations and power consumption issues inherent in analog multi-stage circuits while maintaining sensing capability.
2Measurement precision
If analog multi-stage sensing circuits with large dummy capacitors are used, then sensing capability is improved, but silicon area increases significantly
Solution Approach 1:
The patent extracts and eliminates the large dummy capacitors from the sensing circuit by using the inherent capacitance of the bitline and reference line. This removal of unnecessary capacitive elements significantly reduces the silicon area required while maintaining the differential sensing capability through the voltage difference approach.
Solution Approach 2:
The patent makes the bitline and reference line serve dual functions: they act as both signal transmission paths and as capacitive elements for differential sensing. This multi-functionality eliminates the need for dedicated dummy capacitors, reducing silicon area while preserving sensing capability.
3Reliability
If non-reversible reference active branches are used, then reference current is established, but silicon area increases and sensitivity to process variation increases
Solution Approach 1:
The patent employs an asymmetric configuration where the sense amplifier differentiates between the bitline and reference line, allowing the use of smaller, more compact reference structures. This asymmetric approach reduces silicon area while maintaining reference current stability and reducing process variation sensitivity through the differential comparison mechanism.
4Ease of operation
If additional signal for sensing control is added, then sensing control is enabled, but sensitivity to process variation increases
Solution Approach 1:
The patent maintains equipotential conditions during the sensing operation by carefully controlling the timing and sequence of signal activation. The sense amplifier is enabled only after both bitline and reference line are fully charged to the same voltage level, ensuring that the differential measurement is not affected by process variations in charging characteristics. This timing-based control reduces sensitivity to process variation while maintaining ease of operation.
Data Source
AI summary
Memory circuits and systems are provided. One memory circuit includes an active memory device, an inactive memory device, and a sense amplifier coupled between the active memory device and the inactive memory device. A reference current is coupled between the inactive memory device and the sense amplifier. The active memory device and the inactive memory device are the same type of memory device and the inactive memory device is a reference device with respect to the active memory device's current. A memory system includes a plurality of the above memory circuit coupled to one another. Methods for sensing current in a memory circuit are also provided. One method includes supplying power to a first memory device and comparing the amount of current in the first memory device and a reference current coupled to a second memory device that is the same type of memory device as the first memory device.